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dc.contributor.authorFuh, Chur-Shyangen_US
dc.contributor.authorLiu, Po-Tsunen_US
dc.contributor.authorHuang, Wei-Hsunen_US
dc.contributor.authorSze, Simon M.en_US
dc.date.accessioned2015-07-21T11:20:41Z-
dc.date.available2015-07-21T11:20:41Z-
dc.date.issued2014-11-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2014.2354598en_US
dc.identifier.urihttp://hdl.handle.net/11536/123941-
dc.description.abstractThis letter studies the correlation of postannealing treatment on the electrical performance of amorphous In-Zn-Sn-O thin-film transistor (a-IZTO TFT). The 400 degrees C annealed a-IZTO TFT exhibits a superior performance with field-effect mobility of 39.6 cm(2)/Vs, threshold voltage (V-th) of -2.8 V, and subthreshold swing of 0.25 V/decade. Owing to the structural relaxation by 400 degrees C annealing, both trap states of a-IZTO film and the interface trap states at the a-IZTO/SiO2 interface decrease to 2.16x10(17) cm(-3)eV(-1) and 4.38x10(12) cm(-2) eV(-1), respectively. The positive bias stability of 400 degrees C annealed a-IZTO TFTs is also effectively improved with a Vth shift of 0.92 V.en_US
dc.language.isoen_USen_US
dc.subjectIn-Zn-Sn-O TFTsen_US
dc.subjecthigh mobility TFTsen_US
dc.titleEffect of Annealing on Defect Elimination for High Mobility Amorphous Indium-Zinc-Tin-Oxide Thin-Film Transistoren_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2014.2354598en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume35en_US
dc.citation.issue11en_US
dc.citation.spage1103en_US
dc.citation.epage1105en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.department光電工程學系zh_TW
dc.contributor.department顯示科技研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.contributor.departmentDepartment of Photonicsen_US
dc.contributor.departmentInstitute of Displayen_US
dc.identifier.wosnumberWOS:000344588100011en_US
dc.citation.woscount0en_US
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