Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Ker, MD | en_US |
dc.contributor.author | Tseng, TK | en_US |
dc.contributor.author | Yang, SC | en_US |
dc.contributor.author | Shih, A | en_US |
dc.contributor.author | Tsai, YM | en_US |
dc.date.accessioned | 2014-12-08T15:26:21Z | - |
dc.date.available | 2014-12-08T15:26:21Z | - |
dc.date.issued | 2003 | en_US |
dc.identifier.isbn | 0-7803-7765-6 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/18712 | - |
dc.description.abstract | ESD robustness of Low Temperature Poly-Si (LTPS) diodes and TFT devices has been investigated in this paper. By using the Transmission Line Pulsing (TLP) techniques, the It2 (secondary breakdown current) of LTPS diodes and TFT devices were measured. To evaluate the ESD robustness of components for ESD protection, the shifts of breakdown voltage and cut-in voltage of LTPS diode and TFT devices after TLP stress are considered into failure threshold judgment. From the experimental results, It2 of LTPS diodes under forward-biased stress is better than that of LTPS TFT devices. Furthermore, the It2 of LTPS TFT devices under reverse-biased stress is more robust than it under forward-biased stress. Such investigation results can help us to design a successful ESD protection for the circuits on glass. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Evaluation on ESD robustness of UPS diode and TFT device by transmission line pulsing (TLP) technique | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2003 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS, AND APPLICATIONS, PROCEEDINGS OF TECHNICAL PAPERS | en_US |
dc.citation.spage | 88 | en_US |
dc.citation.epage | 91 | en_US |
dc.contributor.department | 電機學院 | zh_TW |
dc.contributor.department | College of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000189391000024 | - |
Appears in Collections: | Conferences Paper |