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dc.contributor.authorChen, Kuan-Nengen_US
dc.contributor.authorXu, Zhengen_US
dc.contributor.authorLu, Jian-Qiangen_US
dc.date.accessioned2014-12-08T15:28:54Z-
dc.date.available2014-12-08T15:28:54Z-
dc.date.issued2011-08-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2011.2157657en_US
dc.identifier.urihttp://hdl.handle.net/11536/20882-
dc.description.abstractWafer-level Cu oxide hybrid bonding owns a number of merits, including simultaneous formations of electrical and mechanical bonds, underfill free, high alignment accuracy, increasing bond strength, and excellent reliability performance in 3-D integration. This letter demonstrates the fabrication of wafer-level Cu oxide hybrid bonding. Investigations of experimental and electrical simulation data of Cu oxide hybrid bonding structures are reported. Their alignment accuracy, frequency responses, and passive elements are compared for 3-D integration applications.en_US
dc.language.isoen_USen_US
dc.subjectHybrid wafer bondingen_US
dc.subjectwafer levelen_US
dc.subject3-D integrationen_US
dc.titleDemonstration and Electrical Performance Investigation of Wafer-Level Cu Oxide Hybrid Bonding Schemesen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2011.2157657en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume32en_US
dc.citation.issue8en_US
dc.citation.spage1119en_US
dc.citation.epage1121en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000293710400042-
dc.citation.woscount12-
Appears in Collections:Articles


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