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dc.contributor.author唐麗英en_US
dc.contributor.authorTONG LEE-INGen_US
dc.date.accessioned2014-12-13T10:38:27Z-
dc.date.available2014-12-13T10:38:27Z-
dc.date.issued1997en_US
dc.identifier.govdocNSC86-2213-E009-035zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/95390-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=269137&docId=47931en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.subject積體電路zh_TW
dc.subject良率zh_TW
dc.subject缺陷zh_TW
dc.subject波瓦松分配zh_TW
dc.subject缺陷數管制圖zh_TW
dc.subject類神經網路zh_TW
dc.subject群聚zh_TW
dc.subjectIntegrated circuiten_US
dc.subjectYielden_US
dc.subjectDefecten_US
dc.subjectPoisson distributionen_US
dc.subjectC-Charten_US
dc.subjectNeural networken_US
dc.subjectClusteringen_US
dc.title積體電路生產線上利用類神經網路方法分析缺陷群聚現象之修正缺陷數管制圖zh_TW
dc.titleModified Process Control Chart in Integrated Circuits Fabrication---Using Neural Networken_US
dc.typePlanen_US
dc.contributor.department交通大學工業工程與管理系zh_TW
Appears in Collections:Research Plans