Film-Profile-Engineered IGZO Thin-Film Transistors with Gate/Drain Offset for High Voltage Operation

Abstract

IGZO transistors with various gate/drain-offset lengths (L-GDO) were fabricated with the film-profile-engineering method. Breakdown voltage (V-BD) of the fabricated devices increases while transconductance (gm) decreases with increasing LGDO. In contrast, threshold voltage and subthreshold swing remain relatively unchanged. VBD of similar to 80 V is obtained with LGDO of 0.3 mu m . Output characteristics with operation voltage up to 50 V are also demonstrated, evidencing the capability of the device for high-voltage operation. Impact of hot-carrier stress is also investigated in this work.