A Novel Charge-Trapping-Type Memory With Gate-All-Around Poly-Si Nanowire and HfAlO Trapping Layer

Abstract

Hf-based charge-trapping (CT) layers, including HfO2 and HfAlO, were employed in the fabrication of a CT-type memory with gate-all-around (GAA) poly-Si nanowire channels. It is shown that the GAA configuration can greatly enhance the programming/erasing efficiency as compared with the conventional planar scheme. It is also shown that the incorporation of Al into the dielectric can further improve the retention and endurance characteristics over the counterparts with a HfO2 trapping layer. Retardation of the recrystallization of the dielectric film with Al incorporation is postulated to be responsible for these observations.