MULTI-BIT RESISTIVE-SWITCHING MEMORY CELL AND ARRAY
| dc.citation.patentcountry | USA | zh_TW |
| dc.citation.patentnumber | 20130119340 | zh_TW |
| dc.contributor.author | HOU TUO-HUNG | en_US |
| dc.contributor.author | WU SHIH-CHIEH | en_US |
| dc.date.accessioned | 2014-12-16T06:15:00Z | |
| dc.date.available | 2014-12-16T06:15:00Z | |
| dc.date.issued | 2013-05-16 | en_US |
| dc.description.abstract | This invention proposes a multi-bit resistive-switching memory cell and array thereof. Multiple conduction paths are formed on each memory cell and independent of each other, and each conduction path can be in a high-resistance or low-resistance state, so as to form a multi-bit resistive-switching memory cell. A memory cell array can be formed by arranging a plurality of multi-bit resistive-switching memory cells, and the memory cell array provides a simple, high density, high performance and cost-efficient proposal. | zh_TW |
| dc.identifier.govdoc | H01L045/00 | zh_TW |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/105052 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | MULTI-BIT RESISTIVE-SWITCHING MEMORY CELL AND ARRAY | zh_TW |
| dc.type | Patents | en_US |