多晶片模組設計自動化與測試系統---子計畫四：多晶片模組可測性設計

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dc.contributor.author郭斯彥en_US
dc.contributor.authorKUO SY-YENen_US
dc.contributor.department國立台灣大學電機工程學研究所zh_TW
dc.date.accessioned2014-12-13T10:40:11Z
dc.date.available2014-12-13T10:40:11Z
dc.date.issued1994en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.identifier.govdocNSC83-0404-E002-058zh_TW
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=109856&docId=17488en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/97246
dc.language.isozh_TWen_US
dc.title多晶片模組設計自動化與測試系統---子計畫四：多晶片模組可測性設計zh_TW
dc.titleDesign for Testability and Diagnosis in Multichip Modulesen_US
dc.typePlanen_US

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