Browsing by Author "CHANG, CY"

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2-DIMENSIONAL ARSENIC PRECIPITATION BY IN DELTA-DOPING DURING LOW-TEMPERATURE MOLECULAR-BEAM EPITAXY GROWTH OF GAAS OR ALGAAS
(1994-05-09)
CHENG, TM
;
CHANG, CY
;
CHIN, A
;
HUANG, MF
;
HUANG, JH
Low temperature (LT) GaAs delta doped with In and Al have been grown by molecular beam epitaxy and annealed at 600-900-degrees-C for 10 min. As precipitates have been observed to form preferentially on In doping planes while depleting on the Al planes. Similar As precipitates in In-doped LT-Al0.25Ga0.75As are 50% more efficient than that of GaAs. The accumulation or depletion of As precipitates in two-dimensional planes in LT materials using isoelectronic impurities show that the phenomena is not directly related to the electronic properties of dopant impurities and therefore has many device applications.
2-DIMENSIONAL ELECTRON GASES IN DELTA-DOPED GAAS/IN0.25GA0.75AS/GAAS HETEROSTRUCTURES
(1991-06-10)
LIN, W
;
HSU, WC
;
WU, TS
;
CHANG, SZ
;
WANG, C
Delta-doped (delta-doped) GaAs/In0.25Ga0.75As/GaAs strained-layer modulation-doped field-effect transistor (delta-SMODFET) structures grown by the low-pressure metalorganic chemical vapor deposition (LP-MOCVD) technique have been studied for the first time. The delta-doped GaAs, adopted as the electron supplier, was obtained by a stop-growth process so that a very thin and heavily doped layer (1.9 X 10(13) cm-2) can be realized. Experimental results show that a structure with an 80 angstrom In0.25Ga0.75As layer as the active channel and an 80 angstrom spacer layer demonstrated the highest two-dimensional electron gases mobility of 26 800 cm2/V s. This structure is easy to achieve by the LP-MOCVD method because the growth of AlGaAs is avoided and is promising for high performance FETs.
A COMPREHENSIVE STUDY OF SUPPRESSION OF BORON PENETRATION BY AMORPHOUS-SI GATE IN P+-GATE PMOS DEVICES
(1995-12-01)
LIN, CY
;
JUAN, KC
;
CHANG, CY
;
PAN, FM
;
CHOU, PF
This paper presents a comprehensive study of the impact of the silicon gate structure on the suppression of boron penetration in p(+)-gate devices, The characteristics and reliability for different gate structures (poly-Si, alpha-Si, poly-Si/poly-Si, poly-Si/alpha-Si, alpha-Si/poly-Si, and alpha-Si/alpha-Si) in p(+) polygate PMOS devices are investigated in detail, The suppression of boron penetration by the nitrided gate oxide is also discussed, The comparison is based on flatband voltage shift as well as the value of charge to breakdown. Results show that the effect of boron diffusion through the thin gate oxide in p(+) polygate PMOS devices can be significantly suppressed by employing the as-deposited amorphous silicon gate, Stacked structures can also be employed to suppress boron penetration at the expense of higher polygate resistance, The single layer as-deposited amorphous silicon is a suitable silicon gate material in the p(+)-gate PMOS device for future dual-gate CMOS process, In addition, by employing a long time annealing at 600 degrees C prior to p(+)-gate ion implantation and activation, further improvements in suppression of boron penetration, polygate resistance, and gate oxide reliability can be achieved for the as-deposited amorphous-Si gate, Modifying the silicon gate structure instead of the gate dielectrics is an effective approach to suppress the boron penetration effect.
A HYDROGENATED AMORPHOUS SI/SIC HETEROJUNCTION PHOTOTRANSISTOR
(1989-10-01)
HONG, JW
;
CHEN, YW
;
CHANG, KC
;
FANG, YK
;
CHANG, CY
A KNOWLEDGE-BASED OPERATION SUPPORT SYSTEM FOR NETWORK TRAFFIC MANAGEMENT
(1994-01-01)
CHANG, CY
;
CHUNG, CG
;
交大名義發表
;
National Chiao Tung University
The operation of a telephone network is subject to unexpected contingencies such as facilities impairments, trunk congestion, and focused overload. When contingencies happen in the network, the proper control actions must be taken promptly within a short period of time (e.g. 5 minutes); otherwise, the serious congestion will soon spread to the other parts of network. Until now, there has been a lack of an automated approach to generate a contingency routing plan to prevent network degradation. In this paper, a knowledge-based traffic control support system (TRACOSS) is proposed for network traffic management. TRACOSS not only contains four knowledge bases to accumulate the domain expertise used for contingencies detection, diagnosis, affected traffic estimation and control commands generation, but also contains a multicommodity network flow model to formulate the operation of telephone network. Based on this model, a heuristic algorithm is developed to design the contingency routing plan. TRACOSS has the following advantages: (1) The acceptable contingency plan can be obtained by the heuristic algorithm within the fixed time constraint. (2) Four knowledge bases can be used to accumulate the domain expertise to automate the network traffic management. (3) When new network components are installed, knowledge bases can be easily upgraded to adapt new technologies.
A NEW DRAIN ENGINEERING STRUCTURE-SCD-LDD (SURFACE COUNTER DOPED LDD) FOR IMPROVED HOT-CARRIER RELIABILITY
(1993-09-01)
CHOU, JW
;
CHANG, CY
;
HO, LT
;
KO, J
;
HSUE, P
A new SCD-LDD (Surface Counter Doped LDD) structure is proposed. This structure introduces an additional oblique BF2 implant after nLDD implant, which counter-dopes the nLDD surface concentration near the gate edge. As a result, the lateral electric fields beneath the gate were reduced and the saturation drain current was conducted downward away from the maximum electric fields, resulting in a substantial enhancement of hot carrier reliability due to suppression of hot carrier generation and injection with this structure.
A NOVEL 3-TERMINAL VOLTAGE-CONTROLLED SWITCHING DEVICE PREPARED BY MOLECULAR-BEAM EPITAXY
(1989-12-20)
WANG, YH
;
YARN, KF
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CHANG, CY
;
電控工程研究所
;
Institute of Electrical and Control Engineering
A NOVEL DIAC-LIKE SWITCH USING DOUBLE TRIANGULAR BARRIERS
(1994-11-01)
YARN, KF
;
WANG, YH
;
CHANG, CY
;
電控工程研究所
;
Institute of Electrical and Control Engineering
In this study, a new diac-like switch using GaAs double triangular barrier structures (DTBS) prepared by molecular beam epitaxy (MBE) has been fabricated and demonstrated. Unique bidirectional current-voltage (I-V) characteristics between 300 and 77 K were realized for the first time. Large on/off voltage differences and control efficiency were observed in both directions. Based on I-V measurements, the operation mechanism of the diac-like switch was analyzed and is discussed in detail using an equivalent circuit approach. A temperature-dependent effect on the switching voltage, V(S), and holding voltage, V(H), was also investigated.
A NOVEL GAAS CURRENT-CONTROLLED BIPOLAR UNIPOLAR TRANSITION NEGATIVE DIFFERENTIAL RESISTANCE TRANSISTOR PREPARED BY MOLECULAR-BEAM EPITAXY
(1990-06-01)
YARN, KF
;
WANG, YH
;
CHANG, CY
;
電控工程研究所
;
Institute of Electrical and Control Engineering
A PSEUDOMORPHIC GAINP/INP MESFET WITH IMPROVED DEVICE PERFORMANCE
(1993-12-01)
LIN, KC
;
HSIN, YM
;
CHANG, CY
;
CHANG, EY
;
材料科學與工程學系
A high band-gap GaInP epitaxial material was grown on InP to increase the Schottky barrier height of the InP MESFET. The Schottky gate materials used in this study were Au and Pt,Si. The pseudomorphic GaInP/InP MESFET with Au gate has a Schottky barrier height of 0.54 eV and the reverse leakage current of the device is 10(-2) times lower than the conventional InP MESFET. The extrinsic and intrinsic transconductance of the pseudomorphic MESFET were 66.7 and 104.2 mS/mm respectively for the 5 mu m gate length GaInP/InP MESFET.
A STUDY ON BILATERAL LATCH-UP SELF-TRIGGERING IN COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR PROTECTION CIRCUITS
(1994-01-01)
HUANG, HS
;
CHANG, CY
;
CHEN, KL
;
LIU, IO
;
HSU, CC
The results of serial studies on the behavior of bilateral latch-up in complementary metal-oxide-semiconductor field effect transistor (CMOS) protection circuits are presented. Bilateral latch-up self-triggering resulting from serial resistance or serial inductance on V-dd or V-ss is discussed. Optimizing the layout and design of output buffers to improve product performance and reliability is also recommended. The studies on the behavior of bilateral latch-up in CMOS protection circuits are increasingly important since low-power applications are the future trend.
A TRISTATE SWITCH USING TRIANGULAR BARRIERS
(1990-02-01)
WANG, YH
;
YARN, KF
;
CHANG, CY
;
電控工程研究所
;
Institute of Electrical and Control Engineering
ABRUPTNESS OF GE COMPOSITION AT THE SI/SIGE INTERFACE GROWN BY ULTRAHIGH-VACUUM CHEMICAL-VAPOR-DEPOSITION
(1995-08-21)
TSAI, WC
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CHANG, CY
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JUNG, TG
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LIOU, TS
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HUANG, GW
A model is proposed to estimate the interfacial abruptness of the Si/SiGe heterojunction. In this model, a transition region with linearly graded Ge composition is assumed at the Si/SiGe interface. The Ge composition x of Si/SiGe quantum well grown by ultrahigh vacuum chemical vapor deposition at 550 degrees C is found to increase with the deposition time as deposition at the same gas phase composition. This phenomenon can be explained by this model and the fitting results match the measured data. The thickness of the transition region and the transition time can be extracted from these fittings. The transition thicknesses are found to be about 1.9 nm or thinner as grown at 550 degrees C or below. (C) 1995 American Institute of Physics.
AMBIPOLAR PERFORMANCES OF NOVEL AMORPHOUS SILICON-GERMANIUM ALLOY THIN-FILM TRANSISTORS
(1993-08-01)
HSIEH, SW
;
CHANG, CY
;
LEE, YS
;
LIN, CW
;
WU, BS
The limitation of low hole mobility in hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs) was overcome in this present work by utilizing hydrogenated amorphous silicon-germanium (a-Si1-xGex:H) alloys as the active channel of TFTs. The performance of hydrogenated amorphous silicon-germanium thin film transistors (a-SiGe:H TFTs) was optimized by switching the germane-to-silane flow ratio. The fabricated a-SiGe:H TFT with 12 at% germanium content was measured as possessing an electron mobility of 0.71 cm2/V.s and a hole mobility of 0.54 cm2/V.s. The on/off current ratio ranging over almost six orders of magnitude in both conduction modes was obtained. Thus a-SiGe:H TFT has offered the opportunity for upgrading of a-Si:H TFTs and would be feasible for application in [CMOS] circuits.
AMORPHOUS SI/SIC PHOTOTRANSISTORS AND AVALANCHE PHOTODIODES
(1991-06-01)
CHANG, CY
;
HONG, JW
;
FANG, YK
;
交大名義發表
;
National Chiao Tung University
The device structures, operation principles, optoelectronic characteristics, performance comparisons, and possible applications for various a-Si:H/a-SiC:H phototransistors and avalanche photodiodes are reviewed. Although these devices are made of amorphous semiconductors, its majority-carrier transport properties can tactfully avoid gap-state and defect related minority-carrier transport problems, and obtain good performances. Also, each of these devices has the distinct advantage of meeting the requirements of different practical applications. The unique and distinct advantages of these a-Si:H/a-SiC:H devices are first, a variety of peak response wavelengths are achievable by changing the composition or the well-to-barrier widths of the superlattice, secondly, a large-area-detector image sensor can be made on a glass substrate; and thirdly, the low-temperature of the amorphous films (approximately 250-degrees-C) possesses a very abrupt composition change and a doping profile, which are impossible in the single-crystalline semiconductors.
AMORPHOUS-SILICON SILICON-CARBIDE SUPERLATTICE AVALANCHE PHOTODIODES
(1988-08-01)
JWO, SC
;
WU, MT
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FANG, YK
;
CHEN, YW
;
HONG, JW
AN EFFICIENT APPROACH TO REAL-TIME TRAFFIC ROUTEING FOR TELEPHONE NETWORK MANAGEMENT
(1994-02-01)
CHANG, CY
;
CHUNG, CG
;
交大名義發表
;
National Chiao Tung University
When contingencies occur in the telephone network the proper traffic control actions for rearranging the traffic flow must be promptly taken in a short period of time, otherwise, the congestion will soon spread to other parts of the network. In this paper, a multicommodity maximal flow model is proposed to formulate the problem, and an efficient approach is proposed to find the solution within a short time period. The node pairs are first sorted by the traffic demand into decreasing order and the capacity of links is allocated to the node pair with largest demand. The traffic allocation is then iteratively reallocated on those routes which share the same links to find a better solution, until that solution is obtained. The advantages of this approach are: (1) a feasible solution can be obtained within a short time period; (2) the affected traffic can be rerouted on paths with more than two links; (3) an acceptable solution can be found once the period has expired.
AN IMPROVED MO/N-GAAS CONTACT BY INTERPOSITION OF A THIN PD LAYER
(1988-06-01)
NEE, CY
;
CHANG, CY
;
CHENG, TF
;
HUANG, TS
;
電控工程研究所
AN INVESTIGATION OF MINORITY-CARRIER LIFETIME IN SILICON DOPED EITHER WITH ZINC OR COBALT
(1980)
CHANG, CY
;
SU, YK
;
CHI, CC
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交大名義發表
;
National Chiao Tung University
ANALYSIS OF BILATERAL LATCH-UP TRIGGERING IN VLSI CIRCUITS
(1994-02-01)
HUANG, HS
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CHANG, CY
;
HSU, CC
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CHEN, KL
;
LIN, JK