Browsing by Author "CHANG, TE"
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Item type:Item, EFFECTS OF HOT-CARRIER-INDUCED INTERFACE STATE GENERATION IN SUBMICRON LDD MOSFETS(1994-09-01) ;WANG, TH ;HUANG, CM ;CHOU, PC ;CHUNG, SSSCHANG, TEA two-dimensional numerical simulation including a new interface state generation model has been developed to study the performance variation of a LDD MOSFET after a dc voltage stress. The spatial distribution of hot carrier induced interface states is calculated with a breaking silicon-hydrogen bond model. Mobility degradation and reduction of conduction charge due to interface traps are considered. A 0.6 mum LDD MOSFET was fabricated. The drain current degradation and the substrate current variation after a stress were characterized to compare the simulation. A reduction of the substrate current at V(g) congruent-to 0.5 V(d) in a stressed device was observed from both the measurement and the simulation. Our study reveals that the reduction is attributed to a distance between a maximum channel electric field and generated interface states.Item type:Item, INTERFACE TRAP INDUCED THERMIONIC AND FIELD EMISSION CURRENT IN OFF-STATE MOSFETS(1994) ;WANG, TH ;CHANG, TE ;HUANG, CM ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsItem type:Item, INTERFACE-TRAP EFFECT ON GATE INDUCED DRAIN LEAKAGE CURRENT IN SUBMICRON N-MOSFETS(1994-12-01) ;WANG, TH ;HUANG, CM ;CHANG, TE ;CHOU, JWCHANG, CYAn interface trap assisted tunneling mechanism which includes hole tunneling from interface traps to the valence band and electron tunneling from interface traps to the conduction band is presented to model the drain leakage current in a 0.5 mu m LATID N-MOSFET. In experiment, the interface traps were generated by hot carrier stress, The increased drain leakage current due to the band-trap-band tunneling can be adequately described by an analytical expression of Delta I-d = A exp(-Bit/F) with a value of B-it of 13 MV/cm, which is much lower than that (36 MV/cm) of direct band-to-band tunneling.Item type:Item, MECHANISMS OF INTERFACE TRAP-INDUCED DRAIN LEAKAGE CURRENT IN OFF-STATE N-MOSFETS(1995-04-01) ;CHANG, TE ;HUANG, CM ;WANG, TH ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsAn interface trap-assisted tunneling and thermionic emission model has been developed to study an increased drain leakage current in off-state n-MOSFET's after hot carrier stress. In the model a complete band-trap-band leakage path is formed at the Si/SiO2 interface by hole emission from interface traps to a valence band and electron emission from interface traps to a conduction band. Both hole and electron emissions are carried out via quantum tunneling or thermal excitation. In this experiment, a 0.5 mu m n-MOSFET was subjected to a de voltage stress to generate interface traps. The drain leakage current was characterized to compare with the model. Our study reveals that the interface trap-assisted two-step tunneling, hole tunneling followed by electron tunneling, holds responsible for the leakage current at a large drain-to-gate bias (V-dg) The lateral field plays a major role in the two-step tunneling process. The additional drain leakage current due to band-trap-band tunneling is adequately described by an analytical expression Delta I-d = A exp (B-it/F). The value of Bit about 13 mV/cm was obtained in a stressed MOSFET, which is significantly lower than in the GIDL current attributed to direct band-to-band tunneling. As V-dg decreases, a thermionic-field emission mechanism, hole thermionic emission and electron tunneling, becomes a primary leakage path. At a sufficiently low V-dg, our model reduces to the Shockley-Read-Hall theory and thermal generation of electron-hole pairs through traps is dominant.Item type:Item, STRUCTURAL EFFECT ON BAND-TRAP-BAND TUNNELING INDUCED DRAIN LEAKAGE IN N-MOSFETS(1995-12-01) ;WANG, TH ;CHANG, TE ;HUANG, CM ;YANG, JYCHANG, KMThe structural dependence of the hot carrier stress incurred drain leakage current via band-trap-band tunneling in off-state has been modeled and characterized in conventional S/D, DDD, and LDD n-MOSFET structures, The results shows that lateral field enhanced band-trap-band tunneling is primarily responsible for an increased drain leakage current after hot carrier stress in LDD structures while vertical field induced tunneling is dominant in conventional S/D and DDD structures.