Browsing by Author "Chang, Kuo-Chin"
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Item type:Item, Lead-free solder joint reliability estimation of flip chip package using FEM-based sensitivity analysis(2009) ;Lee, Chang-Chun ;Chang, Kuo-Chin ;Yang, Ya-Wen ;生物科技學系Department of Biological Science and TechnologyPurpose - Integration of Cu/low-k interconnects into the next-generation integrated circuit chips, particularly for devices below the 90 nm technology node, has proved necessary to meet the urgent requirements of reducing RC time delay and low power consumption. Accordingly, establishment of feasible and robust packaging technology solutions in relation to the structural design, as well as material selection of the packaging components, has become increasingly important. Moreover, the nature of low-k materials and the use of lead-free solder greatly increases the complications in terms of ensuring enhanced packaging level reliability. The foregoing urgent issue needs to be quickly resolved while developing various advanced packages. This paper aims to focus on the issues. Design/methodology/approach - The prediction model, especially for the fatigue life of lead-free solder joints, combined with virtual design of experiment with factorial analysis was used to obtain the sensitivity information of selecting geometry/material parameters in the proposed low-k flip-chip (FC) package. Moreover, a three-dimensional non-linear strip finite element model associated with the two levels of specified boundary condition of global-local technique was adopted to shorten the time of numerical calculation, as well as to give a highly accurate solution. Findings - The results of thermal cycling in experimental testing show good agreement with the simulated analysis. in addition, the sensitivity of analysis indicates that the type of underfill material has a significant effect on the lead-free solder joint reliability. Originality/value - A suitable combination of concerned designed factors is suggested in this research to enhance the reliability of low-k FC packaging with Pb-free solder joints.Item type:Item, OXIDATION STUDY OF GE CONDENSATION ON SGOI NANOWIRE BIOSENSOR FABRICATION(2013-01-01) ;Chang, Kow-Ming ;Chen, Chu-Feng ;Lai, Chiung-Hui ;Wu, Chin-NingHsieh, Cheng-TingThe Ge condensation method is effective in increasing the Ge fraction of Ge in SGOI. Previous studies by the authors confirmed a correlation between the Ge fraction and the sensitivity of the SiGe nano-wire sensor. To understand how Ge condensation on an SGOI nano-wire sensor helps to optimize oxidation conditions and sensitivity, the effect of oxidizing gas and the SiGe/alpha-Si stacked structure on the movement of Ge is investigated. The analytical results reveal that the sensitivity of SiGe nano-wires can be optimized by stacking an Si1-xGex layer that contains 14% Ge on a 200 angstrom-thick alpha-Si layer and treating the stack with O-2 gas diluted by 13% N-2 for 3 min.Item type:Item, Sensitivity enhancement in SiGe-on-insulator nanowire biosensor fabricated by top surface passivation(2012-08-01) ;Lai, Chiung-Hui ;Chang, Kow-Ming ;Chen, Chu-Feng ;Hsieh, Cheng-TingWu, Chin-NingThe oxidation caused by Ge condensation increases the Ge fraction in a SiGe-on-insulator (SGOI) and significantly increases the hole mobility. This effect can be exploited to improve the sensitivity of SGOI nanowires. However, previous studies have found that the sensitivity of SGOI nanowires degrades when the Ge fraction exceeds 20%, because a high Ge fraction destabilises the surface state of SiGe. In this work, a top surface passivation plasma-enhanced chemical vapour deposition SiO2 layer deposited on a Si0.8Ge0.2 nanowire improved its sensitivity by similar to 1.3 times that of the nanowire sample without a top passivation layer.