Browsing by Author "Chen, Chien-Chih"
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Item type:Item, A Flexible Wildcard-Pattern Matching Accelerator via Simultaneous Discrete Finite Automata(2017-12-01) ;Tsai, Hsiang-Jen ;Chen, Chien-Chih ;Peng, Yin-Chi ;Tsao, Ya-HanChiang, Yen-NingRegular expression matching becomes indispensable elements of Internet of Things network security. However, traditional ternary content addressable memory (TCAM) search engine is unable to handle patterns with wildcards, as it precisely tracks only one active state with single transition. This paper proposes a promising simultaneous pattern matching methodology for wildcard patterns by two separated engines to represent discrete finite automata. A key preprocessing to encode possible postfix pattern by a unique key ensures that follow-up patterns can accurately traverse all possible matches with limited hardware resources. This approach is practical and scalable for achieving good performance and low space consumption in network security, and it can be applicable to any regular expressions even with multiwildcard patterns. The experimental results demonstrate that this scheme can efficiently and accurately recognize wildcard patterns by simultaneously tracking only two active states. By adopting SRAM TCAM in the proposed architecture, the energy consumption is reduced to around 39%, compared with the energy consumption using a computing system that contains a large memory lookup and comparison overhead.Item type:Item, Accelerating R Data Analytics in IoT Edge Systems by Memory Optimization(2017-01-01) ;Liou, De-Yin ;Chen, Chien-Chih ;Chen, Tien-Fu ;Lin, Tay-Jyi資訊工程學系With the number and variety of IoT devices increasing, a large amount of data have to be moved to the cloud, resulting into unpredictable latency from limitation of network bandwidth. R language, the most popular analytic tool, has a serious bottleneck, memory garbage collection, which will become even worse problem at the edge systems with limited memory resources. Processing a large amount of dynamic objects and high percentage of LLC misses with significantmiss penalty are the two key issues in the R execution environment. In this paper, we propose a Partially Parallel Garbage Collection to improve the waiting time during garbage collection; and a centralized memory allocation mechanism to reduce miss penalty that is caused by the high percentage of LLC misses. Our optimizations can bring benefits to those machine learning algorithms that spend most of time in R for processing large data list at the edge systems.Item type:Item, Adaptive Granularity and Coordinated Management for Timely Prefetching in Multi-Core Systems(2015) ;Chang, Chia-Jung ;Peng, Yin-Chi ;Chen, Chien-Chih ;Chen, Tien-FuYew, Pen-ChungFor the last decade, there have been varying techniques for hardware prefetching to improve the system performance. However, untimely prefetching may pollution caches and resulting into significant performance degradation. In this work, we introduce an Adaptive Granularity and coordinated Prefetching (AGP) that consists of a coarse-grained and fine-grained prefetched mechanism to provide a better caching environment for parallel applications. AGP targets on the degree-adjusting and location-choosing and tries to minimize the influence caused by prefetcher for each core. AGP could produce more timely prefetched requests reducing the cache pollutions and contentions. Across a variety of PARSEC benchmarks, AGP can contribute 6.5% (up to 36%) of performance improvement on a 4-core multicore system compared to the non-prefetching.Item type:Item, Applying FDEM, ERT and GPR at a site with soil contamination: A case study(2015-10-01) ;Wang, Tzu-Pin ;Chen, Chien-Chih ;Tong, Lun-Tao ;Chang, Ping-YuChen, Yi-ChiehThis study employed the combination of three methods, namely the Frequency Domain Electromagnetic (FDEM), Electrical Resistivity Tomography (ERT) and Ground Penetrating Radar (GPR) to evaluate a heavy-metal contaminated site for both pre- and post-remediation investigations. The main goals were to verify the position and the integrity of the underground storage tanks (UST), and to determine the effectiveness of remediation to ensure no contaminants remained at the site. In general, the GPR survey was effective at locating shallowly buried objects. However, due to the highly conductive nature of the heavy-metal laden sludge, the GPR signals were attenuated severely. Thus, the first attempt to use GPR in the pre-remediation investigation did not achieve the desired results and other methods were deployed. The existence of the UST and the sludge within were confirmed by ERT and the UST shape was mapped by FDEM. The principal remediation scheme was soil replacement by replacing the contaminated soil with clean silt Based on the distinctive property differences of the contaminated soil and the clean silt, the completion of the remediation was confirmed by the differences between pre-remediation and post-remediation in GPR, ERT and FDEM results. (C) 2015 Elsevier B.V. All rights reserved.Item type:Item, Characterization of Al2O3/ZnO Grown on Si Substrate by Plasma Enhanced Atomic Layer Deposition(2013-01-01) ;Chung, Chen-Chen ;Tran, Binh-Tinh ;Lin, Kung-Liang ;Wang, Ching-ChiunChen, Chien-ChihCharacterization of nanolaminate Al2O3/ZnO oxide films grown on Si substrates was conducted by using plasma enhanced atomic layer deposition (PE-ALD) method. PE-ALD can minimize the structural imperfections in films and reduce substrate damage. The film deposition by using PE-ALD are dense, defect-free, highly uniform, conformal films and show excellent step coverage. Moreover, compared to other deposition techniques, it is possible to deposit high quality films at much lower temperatures. High resolution transmission electron microscope (TEM) images showed the existence of sharp interfacial layers among the Al2O3, ZnO layer, and the Si substrate for the growth rate of 1.56 angstrom/cycle, and the surface roughness of about 0.2 nm. The nanolaminate-stacking layer can be used in organic light emitting diode encapsulation application as the gas barrier.Item type:Item, Clinical evaluation of the eBsensor hand-held blood glucose monitoring system(2007-02-01) ;Chen, Chien-Chih ;Tai, Der-Yan ;Ho, Ping ;Lai, Yiu-KayLin, Jui-JaneBackground: Home glucose monitoring system is increasingly recognized as an important tool for glycemic control. We evaluated the clinical performance of the eBsensor glucose monitoring system. Methods: Fingertip capillary blood glucose concentrations from 282 subjects were measured using eBsensor glucose monitoring system and compared against predicate devices and the Yellow Springs Instruments (YSI) 2300 blood glucose analyzer. Accuracy and precision of the eBsensor glucose monitoring system were assessed using several methods. The comparative study between the eBsensor and 2 currently marketed monitoring systems was performed. Results: The 282 eBsensor readings covered a wide range from 2.6 to 24.4 mmol/l. Deming regression and Pearson correlation analyses showed a linear relationship between the eBsensor readings and the YSI reference method (eBsensor=0.9496 YSI+0.4127 mmol/l; r=0.98). Error Grid analysis demonstrated that 100% of the eBsensor readings in clinically acceptable zones A and B. The CVs for the 6 lots of strips were within the satisfactory interval (< 6%). The comparative study showed that the eBsensor readings correlated well with the OneTouch Ultra values (r=0.97) and the Glucocard II values (r=0.97). Conclusions: eBsensor is a reliable glucose monitoring system which provides high accurate and precise glucose readings over a wide range of glucose concentrations. (c) 2006 Elsevier B.V. All rights reserved.Item type:Item, Cross-Layer Dynamic Prefetching Allocation Strategies for High-Performance Multicores(2013) ;Peng, Yin-Chi ;Chen, Chien-Chih ;Chang, Chia-Jung ;Chen, Tien-FuYew, Pen-ChungFor the last decade, there have been varying techniques for hardware prefetchers to improve the system performance. However, due to limited space and bandwidth in a multicore system, the prefetching data fetched by prefetcher may pollute L1 cache even though the data is useful, thus resulting into significant performance degradation. Most contemporary multicore systems simply disable prefetching to avoid unexpected contention. This paper proposes a cross-layer and dynamic Prefetch Allocation Management (PAM) to provide better caching strategies in a parallel environment. Our approach has two main mechanisms, targeting at the different prefetch degree and location choices to minimize the cache pollution and contention. Across a variety of SPLASH2 and PARSEC benchmark, our PAM approach can contribute up to 12% of performance improvement on a 4-core multicore system compared to the static prefetcher configuration and also saves 9.1% of the memory bandwidth consumption of memory system.Item type:Item, Cross-Layer Dynamic Prefetching Allocation Strategies for High-Performance Multicores(2013-01-01) ;Peng, Yin-Chi ;Chen, Chien-Chih ;Chang, Chia-Jung ;Chen, Tien-FuYew, Pen-ChungFor the last decade, there have been varying techniques for hardware prefetchers to improve the system performance. However, due to limited space and bandwidth in a multicore system, the prefetching data fetched by prefetcher may pollute L1 cache even though the data is useful, thus resulting into significant performance degradation. Most contemporary multicore systems simply disable prefetching to avoid unexpected contention. This paper proposes a cross-layer and dynamic Prefetch Allocation Management (PAM) to provide better caching strategies in a parallel environment. Our approach has two main mechanisms, targeting at the different prefetch degree and location choices to minimize the cache pollution and contention. Across a variety of SPLASH2 and PARSEC benchmark, our PAM approach can contribute up to 12% of performance improvement on a 4-core multicore system compared to the static prefetcher configuration and also saves 9.1% of the memory bandwidth consumption of memory system.Item type:Item, Crystal Quality and Light Output Power of GaN-Based LEDs Grown on Nanoporous Patterned Sapphire Substrate(2014) ;Chen, Chien-Chih ;Yap, Chun-Yan ;Hsu, Wen-Yang ;Kuo, Cheng-TaTsai, Tzong-LiangThe crystal quality and light output power of GaN-based LEDs grown on nanoporous patterned sapphire substrate (NPSS) were investigated. NPSS was prepared using an anodized aluminum oxide (AAO) layer. It was found that the crystal quality of GaN-based LEDs grown on NPSS was better than that on micron-sized patterned sapphire substrate (MPSS) and conventional sapphire substrate. However, the light output power of GaN-based LEDs grown on NPSS was smaller than that on MPSS because the light extraction efficiency (LEE) of MPSS was much larger than that of NPSS. (C) 2014 The Electrochemical Society. All rights reserved.Item type:Item, DAPs: Dynamic Adjustment and Partial Sampling for Multithreaded/Multicore Simulation(2014-01-01) ;Chen, Chien-Chih ;Peng, Yin-Chi ;Chen, Cheng-Fen ;Wu, Wei-ShanMin, QinghaoFaced with increasingly large multicore chip designs, architects need fast and accurate simulations for their exploration of design spaces within a limited simulation time budget. In multithreaded applications, threads cannot run simultaneously. Sampling is commonly used to reduce simulation time, but conventional sampling barely detects the instantaneous program variations of synchronization events and the inconsistency between phases of each core. This work proposes a dynamic adjustment and partial sampling technique (DAPs), consisting of aggressive sampling, lazy sampling, and regular sampling, to overcome thread interference in multithreaded applications. Moreover, DAPs partially selects sampling cores to reduce the overhead of sampling inconsistent phases.Item type:Item, Discriminant analysis of the geomorphic characteristics and stability of landslide dams(2009-09-15) ;Dong, Jia-Jyun ;Tung, Yu-Hsiang ;Chen, Chien-Chih ;Liao, Jyh-JongPan, Yii-WenLandslides can cause the formation of dams, but these dams often fail soon after lake formation. Thus, rapidly evaluating the stability of a landslide dam is crucial for effective hazard mitigation. This study utilizes discriminant analysis based on a Japanese dataset consisting of 43 well documented landslide dams to determine the significant variables, including log-transformed peak flow (or catchment area), and log-transformed dam height, width and length in hierarchical order, which affect the stability of a landslide dam. The high overall prediction power (88.4% of the 43 training cases are correctly classified) and the high cross-validation accuracy (86%) demonstrate the robustness of the proposed discriminant models PHWL (with variables including log-transformed peak flow, and log-transformed dam height, width and length) and AHWL (with variables including log-transformed catchment area, and log-transformed dam height, width and length). Compared to a previously proposed "DBI" index-based graphic approach, the discriminant model AHV - which uses the log-transformed catchment area, dam height, and dam volume as relevant variables - shows better ability to evaluate the stability of landslide dams. Although these discriminant models are established using a Japanese dataset only, the present multivariate statistical approach can be applied for an expanded dataset without any difficulty when more completely documented worldwide landslide-dam data are available. (C) 2009 Elsevier B.V. All rights reserved.Item type:Item, Enhanced performance and reliability of NILC-TFTs using FSG buffer layer(2012-02-15) ;Chen, Chien-Chih ;Wu, YewChung Sermon ;Chang, Chih-Pang ;材料科學與工程學系Department of Materials Science and EngineeringA new manufacturing method for Ni-metal-induced lateral crystallization thin film transistors (NILC-TFTs) using fluorine-silicate-glass (FSG) was proposed. In FSG-TFTs, fluorine ion was implanted into the buffer oxide layer to form FSG before NILC processes. It was found FSG-TFTs exhibit high field-effect mobility, low threshold voltage, low subthreshold slope, high ON/OFF current ratio, low trap state density, low interface trap state density, and good reliability compared with typical NILC-TFTs. (c) 2011 Elsevier B.V. All rights reserved.Item type:Item, Evolution of Bottom c-Plane on Wet-Etched Patterned Sapphire Substrate(2013) ;Chen, Chien-Chih ;Hsiao, Feng Ching ;Lin, Bo-Wen ;Hsu, Wen-ChingWu, YewChung SermonWet-etched pattern sapphire substrate (PSS) has been employed to improve the epitaxy of GaN-based LEDs. It was found that the crystal quality and performance of LEDs improved with decrease in c-plane areas of PSS. However, further decrease in bottom c-plane areas makes epitaxy of GaN film very difficult. In this research, the evolution of bottom c-plane was investigated through a systematic study. It was found that epitaxy difficulty might be due to the appearance of 6C facets {4 (1) over bar(3) over bar 18} and the disappearance of bottom c-plane. (C) 2013 The Electrochemical Society.Item type:Item, Growth and Fabrication of GaN Light Emitting Diode on Patterned-Sapphire Substrate(2013-01-01) ;Binh-Tinh Tran ;Ming, Chen-Hauw ;Lin, Kung-Liang ;Chen, Hao-MingWang, Ching-ChianIn this study, the growth of GaN-films-based light emitting diodes (LEDs), have been clearly demonstrated on wet-etching patterned sapphire substrate (PSS) and conventional LEDs. The wet-etching PSS LED device showed a significantly higher performance than the conventional LED device. The wet-etching PSS LED device exhibited a leakage current of 9 mA under a bias of 8 V, an external quantum efficiency and output powers of 35.09 % and 19.23 mW under 20 mA injection current as compared to 12 mA, 27.23%, and 15.02 mW of the conventional LED device.Item type:Item, Growth of GaN on Patterned Sapphire Substrate with High-Index Facets(2015-01-01) ;Chang, Sheng-Chieh ;Chen, Chien-Chih ;Chang, Tsu-Chi ;Lin, Kun-LinLu, Tien-ChangPeriodic pyramidal array patterned sapphire substrate (PSS) with various inclined facets was fabricated by wet etching. It was found that {3 (4) over bar 17}, {4 (1) over bar(3) over bar 18}, and {12 (3) over bar5} facets are exposed on the PSS structure after etching. GaN grown on the PSS by metal-organic chemical vapor deposition was found to have a semi-polar orientation by structural characterization with scanning and transmission electron microscopy. Also, the results show that GaN is mainly grown on the {12 (3) over bar5} sapphire facet with the orientation relationship between GaN and sapphire as(01 (1) over bar(4) over bar)(GaN) // (3 (3) over bar0 (6) over bar)(sapphire) and [02 (2) over bar1](GaN) // [11 (2) over bar0](sapphire), and the dislocation density in the grown GaN decreased with thickness. In addition, photoluminescence and catholuminescence measurements show only strong near-band-edge emission from the semi-polar GaN on the {12 (3) over bar5} sapphire facet. (C) 2015 The Electrochemical Society. All rights reserved.Item type:Item, Growth of GaN on {12(3)over-bar5}-like Facets of Patterned Sapphire Substrate(2017-01-01) ;Wu, Pei-Yu ;Chen, Chien-Chih ;Huang, Chia-Yen ;Kuo, Hao-ChungLin, Kun-LinGaN has been grown on wet-etched patterned sapphire substrate (PSS) by metal-organic chemical vapor deposition. It has been found that GaN was initiated not only from bottom c-facet but also from E {12 (3) over bar5} facets of hexagonal patterns/pyramids. In this study, a vacancy-PSS on c-plane sapphire was used to investigate the growth of GaN on the E-like facets (E1 and E2) of distorted pyramids. The results show that the orientation relationship between E1-GaN and sapphire is ((11) over bar2 (6) over bar) GaN // ((1) over bar 10 (2) over bar)(sapphire) and [11 (21) over bar] GaN // [11 (2) over bar0](sapphire). At the same time, that between E2-GaN and sapphire is (01 (14) over bar) GaN // (3 (3) over bar0 (6) over bar) sapphire and [02 (2) over bar1] GaN // [11 (2) over bar0] sapphire. (C) 2017 The Electrochemical Society. All rights reserved.Item type:Item, How Well Can We Extract the Permanent Displacement from Low-Cost MEMS Accelerometers?(2017-11-01) ;Jan, Jyh Cherng ;Chao, Wei-An ;Wu, Yih-Min ;Chen, Chien-ChihLin, Cheng-HorngFollowing the recent establishment of a high-density seismic network equipped with low-cost micro-electro-mechanical system (MEMS) P-wave-alert-device (P-Alert) by the earthquake early warning (EEW) research group at the National Taiwan University, a large quantity of strong-motion records from moderate-magnitude earthquakes (M-L > 6) around Taiwan has been accumulated. Using a data preprocessing scheme to recover the dynamic average embedded within the P-Alert data, we adopted an automatic baseline correction approach for the P-Alert accelerograms to determine the coseismic deformation (Cd). Comparisons between the Cd values determined using global positioning system (GPS) data, strong-motion records from the P-Alert network, and data from the Taiwan Strong Motion Instrumentation Program (TSMIP) demonstrates that the near-real-time determination of Cd values (>2 cm), which provide crucial information for seismic hazard mitigation, is possible using records from low-cost MEMS accelerometers.Item type:Item, Leak Stopper: An Actively Revitalized Snoop Filter Architecture with Effective Generation Control(2017-05-01) ;Peng, Yin-Chi ;Chen, Chien-Chih ;Tsai, Hsiang-Jen ;Yang, Keng-HaoHuang, Pei-ZheTo alleviate high energy dissipation of unnecessary snooping accesses, snoop filters have been designed to reduce snoop lookups. These filters have the problem of decreasing filtering efficiency, and thus usually rely on partial or whole filter reset by detecting block evictions. Unfortunately, the reset conditions occur infrequently or unevenly (called passive filter deletion). This work proposes the concept of revitalized snoop filter (RSF) design, which can actively renew the destination filter by employing a generation wrapping-around scheme for various reference behaviors. We further utilize a sampling mechanism for RSF to timely trigger precise filter revitalizations, so that unnecessary RSF flushing can be minimized. The proposed RSF can be integrated to various existent inclusive snoop filters with only a minor change to their designs. We evaluate our proposed design and demonstrate that RSF eliminates 58.6% of snoop energy compared to JETTY on average while inducing only 6.5% of revitalization energy overhead. In addition, RSF eliminates 45.5% of snoop energy compared to stream registers on average and only induces 2.5% of revitalization energy overhead. Overall, these RSFs reduce the total L2 cache energy consumption by 52.1% (58.6% - 6.5%) as compared to JETTY and by 43% (45.5% - 2.5%) as compared to stream registers. Furthermore, RSF improves the overall performance by 1% to 1.4% on average compared to JETTY and stream registers for various benchmark suites.Item type:Item, Leveraging Data Lifetime for Energy-Aware Last Level Non-Volatile SRAM Caches using Redundant Store Elimination(2014-01-01) ;Tsai, Hsiang-Jen ;Chen, Chien-Chih ;Yang, Keng-Hao ;Yang, Ting-ChinHuang, Li-YueNVM has commonly been used to address increasingly large last-level caches (LLCs) requirements by reducing leakage. However, frequent data-writing operations result in increased energy consumption. In this context, a promising memory technology, Non-volatile SRAM (nvSRAM), enables normal and standby operation modes which can be used to store various types of data. However, nvSRAM suffers from high dynamic energy usage due to frequent switching between operation modes. In this paper, we propose a redundant store elimination (RSE) scheme which, on average, discards 94% of needless bit-write operations. Moreover, we present a retention-aware cache management policy to reduce data updates of cache blocks, based on the correlation between data lifetime and cache types. Experimental results demonstrate that our proposal can improve energy consumption of SRAM-based and RRAM-based LLCs by 57% and 31%, respectively.Item type:Item, Lifetime-aware LRU Promotion Policy for Last-level Cache(2015) ;Wu, Hong-Yi ;Chen, Chien-Chih ;Tsai, Hsiang-Jen ;Peng, Yin-ChiChen, Tien-FuThe traditional LRU replacement policy is susceptible to memory-intensive workloads with large non-reused data like thrashing applications and scan applications. For such workloads, the majority of cache blocks don\'t get any cache hits during residing in the cache. Cache performance can be improved by reducing the interference from non-reused data. Therefore, the lifetime of other blocks is increased and it can contribute to cache hit. We propose a Lifetime-aware LRU Promotion Policy and show that changing the promotion policy can effective reduce cache miss in the last-level cache. Our promotion policy dynamically adjusts promotion strategy and increases the lifetime for useful cache blocks. The experimental results show that our proposal reduces the average MPKI by 6% and 9% over EAF and DIP, respectively. In multicore, we also improve the performance and reduce the MPKI.