Browsing by Author "Cheng, Chun-Hu"

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A Flexible IGZO Thin-Film Transistor With Stacked TiO2-Based Dielectrics Fabricated at Room Temperature
(2013-06-01)
Hsu, Hsiao-Hsuan
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Chang, Chun-Yen
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Cheng, Chun-Hu
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電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This letter demonstrates the feasibility of full room temperature InGaZnO thin-film transistor (TFT) using trilayer gate dielectric on flexible substrate. Through integrating high-kappa SiO2/TiO2/SiO2 (STS) gate-stack as well as InGaZnO channel thickness modulation, the resulting flexible indium-gallium-zinc oxide (IGZO)/STS TFTs show low threshold voltage of 0.5 V, small subthreshold swing of 0.129 V/decade, high field effect mobility of 76 cm(2)/Vs, and good I-ON/I-OFF ratio of 6.7 x 10(5), which have the potential for the application of high-resolution flexible display.
A Highly Scalable Poly-Si Junctionless FETs Featuring a Novel Multi-Stacking Hybrid P/N Layer and Vertical Gate with Very High Ion/Ioff for 3D Stacked ICs
(2016)
Cheng, Ya-Chi
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Chen, Hung-Bin
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Chang, Chun-Yen
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Cheng, Chun-Hu
;
Shih, Yi-Jia
This work demonstrates for the first time a three-dimensional (3D) stacked hybrid P/N layer for p-channel junctionless thin-film transistor (JL-TFT) with nanowire (NW) structures. Relative to conventional stacked devices, the 3D stacked hybrid P/N JL-TFT exhibits a high I-on/I-off current ratio (> 10(9)), a steep subthreshold swing (SS) of 70 mV/dec, a low drain-induced barrier lowering (DIBL) value of 3.5 mV/V; these properties are achieved by reducing the effective channel thickness that is determined by the channel/substrate junction. The developed stacked hybrid P/N exhibits reduced low-frequency noise, less sensitive temperature coefficients and performance variation in both threshold voltage (Vth) and SS, and so is suit for high-density 3D stacked integrated circuit (IC) applications.
A Low Operating Voltage IGZO TFT Using LaLuO3 Gate Dielectric
(2013)
Chou, Kun-I
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Hsu, Hsiao-Hsuan
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Cheng, Chun-Hu
;
Lee, Kai-Yu
;
Li, Shang-Rong
This study proposes a low operation voltage indium-gallium-zinc oxide (IGZO) thin-film transistor using a high-kappa lanthanum-lutetium oxide as the gate dielectric. It is the first time to integrate the high-kappa LaLuO3 into an IGZO TFT. The resulting LaLuO3/IGZO TFT shows a low threshold voltage of 0.32 V, a small sub-threshold swing of 310 mV/decade and an acceptable mobility (mu(FE)) of 6.6 cm(2)/V-s. The low V-T and small SS allow device operation voltage below 2.5 V.
Achieving High-Scalability Negative Capacitance FETs with Uniform Sub-35 mV/dec Switch Using Dopant-Free Hafnium Oxide and Gate Strain
(2018-01-01)
Fan, Chia-Chi
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Cheng, Chun-Hu
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Tu, Chun-Yuan
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Liu, Chien
;
Chen, Wan-Hsin
For the first time, we successfully demonstrated that the 4-nm-thick dopant-free HfO2 NCFETs using gate strain can implement an energy-efficient switch of a low gate overdrive voltage and a nearly hysteresis-free sub-40 mV/dec swing. The gate strain favorably rearranges oxygen vacancies and boosts orthorhombic phase transition. Furthermore, the dopant-free HfO2 NCFET can be further improved by in-situ nitridation process. The 4-nm-thick nitrided HfO2 NCFETs achieve a steep symmetric sub-35 mV/dec switch, a sustained sub-40 mV/dec SS distribution, and excellent stress immunity during NC switch. The high-scalability and dopant-free NCFET shows the great potential for the application of future highly-scaled 3D CMOS technology.
Amorphous bilayer TiO2-InGaZnO thin film transistors with low drive voltage
(2014-09-01)
Hsu, Hsiao-Hsuan
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Cheng, Chun-Hu
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Chiou, Ping
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Chiu, Yu-Chien
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Chang, Chun-Yen
This paper describes a high-performance thin-film transistor (TFT) fabricated using TiO2 and InGaZnO semiconducting layers. Favorable transistor characteristics, including a low threshold voltage of 0.45 V, a small subthreshold swing of 174 mV/decade, and a high field effect mobility of 19 cm(2)/V s at a low drive voltage of <2 V, were achieved. This favorable performance mainly resulted from the combined effect of the high-dielectric-constant gate dielectric and the TiO2-InGaZnO active semiconductor bilayer, which reduced the operating voltage, enhanced the device mobility, and improved the transistor gate swing. This TiO2-InGaZnO TFT exhibits great potential for future high-speed and high-resolution display applications. (C) 2014 Elsevier Ltd. All rights reserved.
Amorphous Titanium Oxide Semiconductors on Quasi-Crystal-Like InGaZnO Channels for Thin Film Transistor Applications
(2015-06)
Hsu, Hsiao-Hsuan
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Chiou, Ping
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Cheng, Chun-Hu
;
Yen, Shiang-Shiou
;
Tung, Chien-Hung
This paper reports an InGaZnO thin-film transistor with titanium-oxide semiconductor as channel capping layer. Based on the experimental results, the titanium-oxide semiconductor has the function of not only a surface passivation layer to reduce the defect states localized at grain boundaries near source/drain contacts, but also a mobility booster to enhance electric field across channel. Compared to control IGZO TFT, the crystalline IGZO TFTs with titanium-oxide semiconductor exhibits an improved performance of a low drive voltage of <5 V, a low threshold voltage of 1.9 V, a low sub-threshold swing of 244 mV/decade, and a high mobility of 13.7 cm(2)/V s. The simple titanium-oxide capping process have been demonstrated in this work, which provides considerable potential for further display applications requiring a low power operation and a low-temperature fabrication.
An Oxygen Gettering Scheme for Improving Device Mobility and Subthreshold Swing of InGaZnO-Based Thin-Film Transistor
(2014-09-01)
Hsu, Hsiao-Hsuan
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Chang, Chun-Yen
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Cheng, Chun-Hu
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Chiou, Shan-Haw
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Huang, Chiung-Hui
This study involved developing a low-power and high-mobility metal-oxide thin-film transistor that incorporated a bilayer IGZO/IGZO:Ti semiconductor material. Compared with control metal-oxide TFTs, the bilayer IGZO TFT through thickness modulation of IGZO: Ti can reach the smallest subthreshold swing (85 mV/decade) and the highest field effect mobility (49 cm(2)/Vs) at a drive voltage of <3 V. This performance level improvement can be attributed to the gettering effect caused by the IGZO: Ti capping layer and its dual advantages, which enhance device mobility and improve gate swing.
Bipolar Conduction in Tin-Oxide Semiconductor Channel Treated by Oxygen Plasma for Low-Power Thin-Film Transistor Application
(2016-03)
Chen, Po-Chun
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Wu, Yung-Hsien
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Zheng, Zhi-Wei
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Chiu, Yu-Chien
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Cheng, Chun-Hu
In this paper, we investigated the bipolar conduction mechanism in thin-film transistors (TFTs) with oxygen plasma treatment on tin-oxide channel. The optimized p-type thin-oxide TFTs showed an on/off ratio of >10(4), a threshold voltage of -1.05 V, and a field-effect mobility of 2.14 cm(2).V-1.s(-1). By increasing the exposure time of oxygen plasma, excess oxygen was incorporated to thin-oxide channel and converted thin monoxide to oxygen-rich n-type thin dioxide, which in turn led to n-type operation. It indicated that oxygen plasma was the critical factor to determine oxygen concentration, oxygen vacancies, metal ions and channel polarity. This proposed oxygen-content tuning through plasma treatment approach shows great promise in simplification of TFT process that can achieve n-type and p-type TFTs under the same device process.
Characteristic Simulation of Hybrid Multilayer Junctionless Field Effect Transistors with Negative Capacitance Effect
(2020-01-01)
Ma, Jun
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Liu, Chien
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Liu, Wei-Dong
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Hung, Yu-Wen
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Fan, Yu-Chi
In this study, we reported a hybrid multi-PNPN channel junctionless field effect transistor (JLFET) with negative capacitance (NC) effect by simulation. By incorporating a ferroelectric HfAlO capacitor with NC effect, an extremely low subthreshold swing of 34 mVdecade, a very high onoff current ratio and a very low driven voltage were achieved in the NC-enhanced hybrid multi-PNPN channel JLFET. This novel device not only improves the on-state current reduction while channel scaling down, but also shows great potential for the next-generation low-power three-dimensional stacked integrated circuit applications.
Characteristics of 4H-SiC RF MOSFETs on a Semi-insulating Substrate
(2011)
Wu, Tian-Li
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Huang, Chih-Fang
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Cheng, Chun-Hu
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
This study has provided considerable insight into the impact of device down scaling on the characteristics of RF devices. This type of RF devices, featuring a thin p-layer based on a semi-insulating substrate, is free from the unwanted parasitic effects resulting from traditional conducting substrates. We fabricated 4H-SiC RF MOSFETs with f(T)/f(MAX) of 0.7/1.5 GHz and, in so doing, identified the key issues associated with short channel effects, influencing device mobility and the RF characteristics of RF MOSFETs on a semi-insulating substrate.
Correlation of thermal annealing effect, crystallinity and electrical characteristics in c-axis crystallized InGaZnO thin-film transistors
(2015-09-15)
Hsu, Hsiao-Hsuan
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Yen, Shiang-Shiou
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Chiu, Yu-Chien
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Chiou, Ping
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Chang, Chun-Yen
A low off-state current of 1.6 x 10(-14) A/mu m and a small subthreshold gate swing of 152 mV/decade were achieved in a novel thin film transistor using a c-axis crystallized InGaZnO semiconductor that could be obtained at a low substrate temperature range of 150 degrees C. From experimental results, we found that the lowered off-state current is mainly attributed to the formation of rich Ga-O bonds to reduce oxygen vacancies, and the c-axis crystallized structure of IGZO to increase the potential barrier on the source side due to the increase of local trap states at the grain boundary. (C) 2015 Elsevier B.V. All rights reserved.
Crystallized Ohmic Contact Effect in AlGaN/GaN High Electron Mobility Transistor
(2013-08-01)
Liao, Sheng Yu
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Chang, Tsu
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Hsu, Hsiao-Hsuan
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Cheng, Chun-Hu
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Chang, Liann-Be
In this study, we investigate the grain size effect of high electron mobility transistor devices with ohmic contact metals of stacked Ti/Al/Ni/Au and Ti/Al/Mo/Au. In addition to a comparison of electrical characteristics, the ohmic contacts were also examined by a scratch test for the observation of adhesion behavior. The experimental results demonstrate that the metal grain size is strongly dependent on metal adhesion, which may lead to bonding issues. Moreover, the grain-induced lateral stress lowers the drive current and increases the off-state current owing to the degraded gate swing and transconductance of transistor switching characteristics. (C) 2013 The Japan Society of Applied Physics
Current Uniformity Improvement in Flexible Resistive Memory
(2013)
Zheng, Zhi-Wei
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Cheng, Chun-Hu
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Chou, Kun-I
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Liu, Ming
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Chin, Albert
High uniform current distribution, good endurance, and low 28 mu W switching power are successfully achieved in Ni/GeOx/TiOy/TaN resistive random access memory devices on flexible polyimide substrate. The good performances are attributed to the nitrogen-rich TaN to increase the oxidation resistance and decrease the TaON and oxygen vacancies formation from x-ray photoelectron spectroscopy measurements, where such oxygen vacancies are related to current conduction at high resistance state. The present results demonstrate that the device with nitrogen-rich TaN electrode has a strong potential for future low-cost high-performance flexible memory application.
Effect of Ta(2)O(5) Doping on Electrical Characteristics of SrTiO(3) Metal-Insulator-Metal Capacitors
(2009-08-01)
Huang, Ching-Chien
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Cheng, Chun-Hu
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Liou, Bo-Heng
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Yeh, Fon-Shan
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Chin, Albert
The effect of Ta(2)O(5) doping on electrical characteristics of SrTiO(3) (STO) metal-insulator-metal (MIM) capacitors was studied for the first time. Using Ta(2)O(5)-doped STO dielectrics, an absolute quadratic voltage coefficient of capacitance (VCC-alpha) of 510 ppm/V(2) and a high capacitance density of similar to 20 fF/mu m(2) are achieved. These are approximately one order of magnitude lower than those of the MIM capacitor fabricated using a pure STO. In addition, the degradation of electrical properties (capacitance variation versus voltage, VCC-alpha, and long-term reliability) after electrical stressing is reduced, compared with that of an MIM capacitor fabricated using a pure STO. (C) 2009 The Japan Society of Applied Physics
Effect of Ta2O5 Doping on Electrical Characteristics of SrTiO3 Metal-Insulator-Metal Capacitors
(2009-08-01)
Huang, Ching-Chien
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Cheng, Chun-Hu
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Liou, Bo-Heng
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Yeh, Fon-Shan
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Chin, Albert
The effect of Ta2O5 doping on electrical characteristics of SrTiO3 (STO) metal-insulator-metal (MIM) capacitors was studied for the first time. Using Ta2O5-doped STO dielectrics, an absolute quadratic voltage coefficient of capacitance (VCC-alpha) of 510 ppm/V-2 and a high capacitance density of similar to 20 fF/mu m(2) are achieved. These are approximately one order of magnitude lower than those of the MIM capacitor fabricated using a pure STO. In addition, the degradation of electrical properties (capacitance variation versus voltage, VCC-alpha, and long-term reliability) after electrical stressing is reduced, compared with that of an MIM capacitor fabricated using a pure STO. (C) 2009 The Japan Society of Applied Physics
Energy-Efficient HfAlOx NCFET: Using Gate Strain and Defect Passivation to Realize Nearly Hysteresis-Free Sub-25mV/dec Switch with Ultralow Leakage
(2017-01-01)
Fan, Chia-Chi
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Cheng, Chun-Hu
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Chen, Yi-Ru
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Liu, Chien
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Chang, Chun-Yen
We experimentally demonstrated that ferroelectric HfAlOx negative capacitance FETs using gate strain and defect passivation can realize a nearly hysteresis-free forward/reverse swing of < 25 mV/dec for symmetric switch, a wide sub-60 mV/dec SS range over 4 decade of I-DS to reach an ultralow I-off of 4 fA/mu m, and a very high I-on/I-off ratio of > 10(8). Under the influence of gate strain and negative capacitance, the NCFETs exhibits 66% I-on enhancement and 27% V-T reduction. In addition, the fluorine defect passivation reduces oxygen vacancies of gate stack to further mitigate interface depolarization field and help to significantly reinforce surface potential amplification effect during NC operation.
Energy-Efficient Versatile Memories With Ferroelectric Negative Capacitance by Gate-Strain Enhancement
(2017-08-01)
Chiu, Yu-Chien
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Cheng, Chun-Hu
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Liou, Guan-Lin
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Chang, Chun-Yen
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電子工程學系及電子研究所
In this brief, we reported a ferroelectric versatile memory with strained-gate engineering. The versatile memory with high-strain-gate showed a >40% improvement on ferroelectric hysteresis window, compared to low-strain case. The high compressive stress induced from high nitrogen-content TaN enhances monoclinic-to-orthorhombic phase transition to reach stronger ferrolectric polarization and lower depolarization field. The versatile memory featuring ferroelectric negative capacitance exhibited excellent transfer characteristics of the sub-60-mVdec subthreshold swing, ultralow off-state leakage of <1fA/mu m and > 108 on/off current ratio. Furthermore, the ferroelectric versatile memory can be switched by +/- 5 V under 20-ns speed for a long endurance cycling (similar to 10(12) cycles). The low-power operation can be ascribed to the amplification of the surface potential to reach the strong inversion and fast domain polarization at the correspondingly low program/erase voltages.
Evaluation of Temperature Stability of Trilayer Resistive Memories Using Work-Function Tuning
(2013-04-01)
Cheng, Chun-Hu
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Chin, Albert
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
A trilayer resistive memory with a low picojoule switching energy shows highly uniform current distribution, fast switching speed of 10 ns, and robust endurance cycling of 10(6) cycles under high-temperature (343 K) operation. Such good performance is related to high-temperature stable Ni electrode, fast electron hopping via nanocrystallized anatase TiO2, and nonuniform electric-field distribution to dilute cycling stress. The evaluation of thermal stability is mandatory for the application of reliable high-density three-dimensional nonvolatile memory. (C) 2013 The Japan Society of Applied Physics
Evaluation of the nanoindentation behaviors of SiGe epitaxial layer on Si substrate
(2010-01-01)
He, Bo-Ching
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Cheng, Chun-Hu
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Wen, Hua-Chiang
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Lai, Yi-Shao
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Yang, Ping-Feng
In this paper, ultra-high vacuum chemical vapor deposition (UHV/CVD) was employed to synthesize silicon-germanium (SiGe), and sequence to endure annealing treatment. Morphological characterization, roughness, and microstructural morphology were observed by means of scanning electron microscopy (SEM), atomic force microscopy (AFM), and transmission electron microscopy (TEM). The elements distribution, crystallographic, and nanomechanical behavior were carried out using energy-dispersive Xray spectroscopy (EDS) mapping technique, X-ray diffraction (XRD), and nanoindentation technique. The annealing treated SiGe leads to the 2D germanium segregation on the surface. The phenomenon is interpreted in terms of dislocation-induced structural changes in annealing treatment, Thus, the dislocation propagation in the microstructure was observed. Subsequently hardness and elastic modulus were increased because of a comparatively unstable microstructure after annealing treatment. (C) 2009 Elsevier Ltd. All rights reserved.
Experimental Observation of Negative Capacitance Switching Behavior in One-Transistor Ferroelectric Versatile Memory
(2017-10-01)
Cheng, Chun-Hu
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Chiu, Yu-Chien
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Liou, Guan-Lin
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電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In this work, we investigated the negative capacitance behavior of novel ferroelectric versatile memory with low-voltage-driven and fast ferroelectric switching. The combined storage mechanism strengthened the stability of ferroelectric polarization by interface aligned dipoles. The simulation results of first principle calculation indicated that the monoclinic-like orthorhombic phase of ferroelectric hafnium oxide facilitated the occurrence of S-shaped negative capacitance behavior. Furthermore, the control of phase transition may affect ferroelectric property and negative capacitance effect during program and erase states.