Browsing by Author "Chi, Li-Jen"
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Item type:Item, 1-V Full-Swing Depletion-Load a-In-Ga-Zn-O Inverters for Back-End-of-Line Compatible 3D Integration(2016-04) ;Chi, Li-Jen ;Yu, Ming-Jiue ;Chang, Yu-Hong ;Hou, Tuo-Hung電子工程學系及電子研究所To enable monolithic three-dimensional integration of the amorphous In-Ga-Zn-O (a-IGZO) and CMOS technologies, the a-IGZO inverters compatible with the low operating voltage (<= 1 V) and process temperature of back-end-of-line CMOS have been investigated. We demonstrated a full-swing depletion-load inverter with a voltage gain up to 24 using a CMOS-compatible operating voltage of 1 V. The drive transistor was realized using a low-voltage enhancement-mode a-IGZO thin-film transistor (TFT) with a steep subthreshold swing of 70 mV/decade and a low threshold voltage of 0.5 V. The load transistor was implemented using a bi-layer a-IGZO channel, where the a-IGZO composition was modulated simply by the oxygen flow rate in a depletion-mode TFT.Item type:Item, Fast Visible-Light Phototransistor Using CVD-Synthesized Large-Area Bilayer WSe2(2014) ;Liu, Pang-Shiuan ;Chen, Chang-Hsiao ;Hsu, Wei-Ting ;Lin, Chih-PinLin, Tzu-PingP-channel transition metal dichalcogenide ultrathin-body phototransistor (UTB-PT) with a response time as fast as 100 mu s has been demonstrated for the first time using the CVD-synthesized large-area bilayer WSe2. Because of its excellent compatibility with mass production, the application of WSe2 UTB-PT for high-speed proximity interactive display has been proposed.Item type:Item, Low-Cost Embedded RRAM Technology for System-on-Plastic Integration Using a-IGZO TFTs(2013) ;Hou, Tuo-Hung ;Wu, Shih-Chieh ;Yu, Ming-Jiue ;Liu, Pang-ShiuanChi, Li-JenThis paper discusses the recent progress of a-IGZO TFTs for both high-performance logic and nonvolatile memory applications using an identical device structure, which opens up new opportunities of low-cost embedded memory for system-on-plastic integration. Using localized, independent, and multi-level resistive switching in a-IGZO TFTs, several compact memory array architectures with extremely high bit density have been proposed.