Browsing by Author "Chiang, Che-Yang"

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Assessment of Thermal Impact on Performance of Metamorphic High-Electron-Mobility Transistors on Polymer Substrates Using Flip-Chip-on-Board Technology
(2013-12-01)
Wang, Chin-Te
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Chang, Edward Yi
;
Lim, Wee-Chin
In this study, we have fabricated and characterized an In0.6Ga0.4As metamorphic high-electron-mobility transistor (mHEMT) device packaged using flip-chip-on-board (FCOB) technology. A low-cost polymer substrate was adopted as the carrier for cost-effective purposes. The impact of bonding temperature on the device performance was also experimentally investigated. While the DC performance was not as sensitive, serious degradation in RF performance was observed at high bonding temperature. Such degradation was mainly due to the thermal-mechanical stress resulting from the mismatch in the coefficient of thermal expansion (CTE) between the GaAs chip and the polymer substrate. Quantitative assessment was also performed through equivalent circuit extraction from S-parameter measurements. (C) 2013 The Japan Society of Applied Physics
Bias-Dependent Radio Frequency Performance for 40nm InAs High-Electron-Mobility Transistor with a Cutoff Frequency Higher than 600GHz
(2012-11-01)
Fatah, Faiz
;
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Hsu, Ching-Yi
In this paper, we present the fabrication and characterization of 40 nm InAs-channel high-electron-mobility-transistor (HEMT) devices. Both DC and RF measurements were performed under various bias conditions. We have also extracted bias-dependent intrinsic device parameters to determine the optimum conditions of operation. It is concluded that a high current-gain cutoff frequency (f(T)) of 615 GHz can be achieved when the device is biased near the occurrence of impact ionization. (C) 2012 The Japan Society of Applied Physics
Effect of Field Plate on the RF Performance of AlGaN/GaN HEMT Devices
(2012-01-01)
Chiang, Che-Yang
;
Hsu, Heng-Tung
;
Chang, Edward Yi
;
材料科學與工程學系
;
Department of Materials Science and Engineering
This paper examines the effect of the field plate structure on the RF performance of AlGaN/GaN High Electron Mobility Transistor (HEMT) devices. While the field plate structure helps to increase the breakdown voltage of the device through modulating the electric field locally, it induces additional feedback capacitance from drain to gate. Such feedback capacitors may impact the overall RF performance of the device especially at high frequencies. Systematic investigations on the small signal as well as power performance as functions of the drain biases are presented. (C) 2011 Published by Elsevier B.V. Selection and/or peer-review under responsibility of Garry Lee
Fabrication of AlGaN/GaN High Electron Mobility Transistors (HEMTs) on Silicon Substrate with Slant Field Plates Using Deep-UV Lithography Featuring 5W/mm Power Density at X-band
(2012)
Chang, Chia-Hua
;
Hsu, Heng-Tung
;
Huang, Lu-Che
;
Chiang, Che-Yang
;
Chang, Edward Yi
In this work, AlGaN/GaN HEMTs on silicon with slant field platehave been successfully fabricated using deep-UV lithography. By using an angle exposure technique, submicron T-shaped gates with slant sidewalls were achieved. The 0.6 x 100 mu m(2) slant-field-plated AlGaN/GaN HEMT on silicon substrate exhibited a peak value of transconductance of 214 mS/mm and a breakdown voltage of 122 V. Through high-frequency measurements, the device revealed a current gain cutoff frequency (f(T)) of 24 GHz, a maximum oscillation frequency (f(max)) of 49 GHz and an output power density of 5.0 W/mm at X-band.
InAs Thin-Channel High-Electron-Mobility Transistors with Very High Current-Gain Cutoff Frequency for Emerging Submillimeter-Wave Applications
(2013-03-01)
Chang, Edward-Yi
;
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Miyamoto, Yasuyuki
60 nm InAs high-electron-mobility transistors (HEMTs) with a thin channel, a thin InAlAs barrier layer, and a very high gate stem structure have been fabricated and characterized. The thickness of the channel, as well as that of the InAlAs barrier layer, was reduced to 5 nm. A stem height of 250 nm with a Pt-buried gate was used in the device configuration to reduce the parasitics. A high DC transconductance of 2114 mS/mm and a current-gain cutoff frequency (f(T)) of 710 GHz were achieved at V-DS 0.5V. (C) 2013 The Japan Society of Applied Physics
Monolithic wideband linear power amplifier with 45% power bandwidth using pseudomorphic high-electron-mobility transistors for long-term evolution application
(2014-11-01)
Chiang, Che-Yang
;
Hsu, Heng-Tung
;
Chang, Edward Y.
;
材料科學與工程學系
;
Department of Materials Science and Engineering
A fully integrated, monolithic, wideband linear power amplifier using pseudomorphic high-electron-mobility transistor (pHEMT) technology has been developed for long-term evolution (LTE) applications. Implemented through the stacked field-effect transistor (stacked-FET) configuration, the amplifier exhibited a small signal gain of 15 dB and an output power of 25 dBm at 1 dB compression (P-idB) with a power-added efficiency (PAE) of 36% from 1.7 to 2.7 GHz yielding 45% power bandwidth. Moreover, when tested under a 10 MHz LTE-modulated signal, the amplifier achieved a 3% error-vector-magnitude (EVM) at 23 dBm output power over the entire power bandwidth. (C) 2014 The Japan Society of Applied Physics
Performance Enhancement of Flip-Chip Packaged AlGaN/GaN HEMTs Using Active-Region Bumps-Induced Piezoelectric Effect
(2014-07-01)
Tsai, Szu-Ping
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Tu, Yung-Yi
;
Chang, Chia-Hua
We experimentally investigated the impact of different bump patterns on the output electrical characteristics of flip-chip (FC) bonded AlGaN/GaN high-electron mobility transistors in this letter. The bump patterns were designed and intended to provide different levels of tensile stress due to the mismatch in the coefficient of thermal expansion between the materials. After FC packaging, a maximum increase of 4.3% in saturation current was achieved compared with the bare die when proper arrangement of the bumps in active region was designed. In other words, a 17% improvement has been observed on the optimized bump pattern over the conventional bump pattern. To the best of our knowledge, this is the first letter that investigates the piezoelectric effect induced by FC bumps leading to the enhancement in device characteristics after packaging.
Performance Enhancement of Flip-Chip Packaged AlGaN/GaN HEMTs Using Active-Region Bumps-Induced Piezoelectric Effect
(2014-07-01)
Tsai, Szu-Ping
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Tu, Yung-Yi
;
Chang, Chia-Hua
We experimentally investigated the impact of different bump patterns on the output electrical characteristics of flip-chip (FC) bonded AlGaN/GaN high-electron mobility transistors in this letter. The bump patterns were designed and intended to provide different levels of tensile stress due to the mismatch in the coefficient of thermal expansion between the materials. After FC packaging, a maximum increase of 4.3% in saturation current was achieved compared with the bare die when proper arrangement of the bumps in active region was designed. In other words, a 17% improvement has been observed on the optimized bump pattern over the conventional bump pattern. To the best of our knowledge, this is the first letter that investigates the piezoelectric effect induced by FC bumps leading to the enhancement in device characteristics after packaging.
Performance Evaluation of InGaSb/AlSb P-Channel High-Hole-Mobility Transistor Faricated Using BCl3 Dry Etching
(2013-02-01)
Yu, Chia-Hui
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Kuo, Chien-I
;
Miyamoto, Yasuyuki
In this study, we present the fabrication and characterization of InGaSb/AlSb p-channel high-hole-mobility-transistor devices using inductively coupled plasma (ICP) etching with BCl3 gas. Devices fabricated by the dry etching technique show good DC and RF performances. Radio-frequency (RF) performance for devices with different source-to-drain spacing (L-SD) and gate length (L-g) were investigated. The fabricated 80-nm-gate-length p-channel device with 2-mu m LSD exhibited a maximum drain current of 86.2mA/mm with peak transconductance (g(m)) of 64.5mS/mm. The current gain cutoff frequency (f(T)) was measured to be 15.8 GHz when the device was biased at V-DS = -1.2 V and V-GS = 0.4 V. (C) 2013 The Japan Society of Applied Physics
Single-pole Double-throw Switch Using Stacked-FET Configuration at Millimeter Wave Frequencies
(2018-01-01)
Mei, Peng-, I
;
Wu, Guan-Wei
;
Hsu, Heng-Shou
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Huang, Ting-Jui
;
Tsao, Yi-Fan
In this paper, we present single-pole double-throw (SPDT) switch at Ka-band for phased array front-end applications. The proposed switch composed of three shunt arms and a quarter-wave length impedance transformer in series on each branch. The stacked-FET configuration was adopted to enhance the power handling capability. Implemented with 0.15um GaAs pHEMT technology by WIN Semiconductor, the overall chip size was 2 mm by 1 mm. The measured insertion loss was less than 3 dB with better than 25 dB isolation from 15 GHz to 35 GHz. The proposed configuration also featured an input 1 dB compression point of 26 dBm.
V-Band Flip-Chip Assembled Gain Block Using In(0.6)Ga(0.4)As Metamorphic High-Electron-Mobility Transistor Technology
(2011-10-01)
Chiang, Che-Yang
;
Hsu, Heng-Tung
;
Wang, Chin-Te
;
Kuo, Chien-I
;
Hsu, Heng-Shou
This study fabricated a 150 nm In(0.6)Ga(0.4)As metamorphic high-electron-mobility transistor (mHEMT) device with flip-chip packaging. The packaged device exhibited favorable DC characteristics with I(DS) = 350 mA/mm and a transconductance of 600 mS/mm at V(DS) = 0.5V. A maximum available gain (MAG) of 6.5 dB at 60 GHz was achieved with 10 mW DC power consumption. A two-stage gain block was designed and fabricated. The gain block exhibited a small signal gain of 9 dB at 60 GHz with only 20 mW DC power consumption. Such superior performance is comparable to the mainstream submicron complimentary metal-oxide-semiconductor (CMOS) technology with lower power consumption. (C) 2011 The Japan Society of Applied Physics
V-Band Flip-Chip Assembled Gain Block Using In0.6Ga0.4As Metamorphic High-Electron-Mobility Transistor Technology
(2011-10-01)
Chiang, Che-Yang
;
Hsu, Heng-Tung
;
Wang, Chin-Te
;
Kuo, Chien-I
;
Hsu, Heng-Shou
This study fabricated a 150 nm In0.6Ga0.4As metamorphic high-electron-mobility transistor (mHEMT) device with flip-chip packaging. The packaged device exhibited favorable DC characteristics with I-DS = 350 mA/mm and a transconductance of 600 mS/mm at V-DS = 0.5V. A maximum available gain (MAG) of 6.5 dB at 60 GHz was achieved with 10 mW DC power consumption. A two-stage gain block was designed and fabricated. The gain block exhibited a small signal gain of 9 dB at 60 GHz with only 20 mW DC power consumption. Such superior performance is comparable to the mainstream submicron complimentary metal-oxide-semiconductor (CMOS) technology with lower power consumption. (C) 2011 The Japan Society of Applied Physics