Browsing by Author "Chiang, LP"

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A comprehensive study of hot carrier stress-induced drain leakage current degradation in thin-oxide n-MOSFET's
(1999-09-01)
Wang, TH
;
Chiang, LP
;
Zous, NK
;
Hsu, CF
;
Huang, LY
The mechanisms and characteristics of hot carrier stress-induced drain leakage current degradation in thin-oxide n-MOSFET's are investigated. Both interface trap and oxide charge effects are analyzed. Various drain leakage current components at zero V-gs such as drain-to-source subthreshold leakage, band-to-band tunneling current, and interface trap-induced leakage are taken into account, The trap-assisted drain leakage mechanisms include charge sequential tunneling current, thermionic-field emission current,:and Shockley-Read-Hall generation current. The dependence of drain leakage current on supply voltage, temperature, and oxide thickness is characterized. Our result shows that the trap-assisted leakage may become a dominant drain leakage mechanism as supply voltage is reduced. In addition, a strong oxide thickness dependence of drain leakage degradation is observed. In ultra-thin gate oxide (30 Angstrom) n-MOSFET's, drain leakage current degradation is attributed mostly to interface trap creation, while in thicker oxide (53 Angstrom) devices, the drain leakage current exhibits two-stage degradation, a power law degradation rate in the initial stage due to interface trap generation, followed by an accelerated degradation rate in the second stage caused by oxide charge creation.
A new technique to extract oxide trap time constants in MOSFET's
(1996-08-01)
Wang, TH
;
Chang, TE
;
Chiang, LP
;
Huang, C
;
電子工程學系及電子研究所
A new technique to determine oxide trap time Constants in a 0.6 mu m n-MOSFET subject to hot electron stress has been proposed, In this method, we used GIDL current as a direct monitor of the oxide charge detrapping-induced transient characteristics. An analytical model relating the GIDL current evolution to oxide trap time constants was derived, Our result shows that under a field-emission dominant oxide charge detrapping condition, V-gs = -4 V and V-ds = 3 V, the hot electron stress generated oxide traps exhibit two distinct time constants from seconds to several tens of seconds.
A new technique to measure an oxide trap density in a hot carrier stressed n-MOSFET
(1997)
Wang, TH
;
Chiang, LP
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Chang, TE
;
Zous, NK
;
Shen, KY
We have proposed a new measurement technique to characterize the hot carrier stress generated oxide traps in a n-MOSFET by measuring subthreshold current. In this technique, a specially designed measurement consisting of a series of oxide charge detrapping and subthreshold current measurement phases was performed. An analytical model accounting for the temporal evolution of subthreshold current due to oxide charge detrapping was derived. Our study shows that this method is extremely sensitive to an oxide charge variation. By using this method, the oxide trap growth rates by hot electron stress and hot hole stress were measured.
Auger recombination enhanced hot carrier degradation in nMOSFETs with positive substrate bias
(2000)
Chiang, LP
;
Tsai, CW
;
Wang, T
;
Liu, UC
;
Wang, MC
Enhanced hot carrier degradation is observed in DTMOS-like operation mode. This phenomenon is attributed to Auger recombination assisted hot electron process. Measured hot electron gate current and light emission spectrum in nMOSFETs provide evidence that the high-energy tail of channel electrons is increased by the application of a positive substrate bias. As opposed to conventional hot carrier degradation, the Auger enhanced degradation exhibits positive temperature dependence and is more significant at low drain bias.
Characterization of various stress-induced oxide traps in MOSFET's by using a novel transient current technique
(1997)
Wang, TH
;
Chiang, LP
;
Zous, NK
;
Chang, TE
;
Huang, C
A new oxide trap characterization technique by employing a two-phase subthreshold current measurement has been developed. By varing the gate bias and the drain bias in measurement, the field and temperature dependences of oxide charge detrapping and the spatial distributions of various stress induced oxide traps are characterized.
Characterization of various stress-induced oxide traps in MOSFET's by using a subthreshold transient current technique
(1998-08-01)
Wang, TH
;
Chiang, LP
;
Zous, NK
;
Chang, TE
;
Huang, C
An oxide trap characterization technique by measuring a subthreshold current transient is developed, This technique consists of two alternating phases, an oxide charge detrapping phase and a subthreshold current measurement phase. An analytical model relating a subthreshold current transient to oxide charge tunnel detrapping is derived. By taking advantage of a large difference between interface trap and oxide trap time-constants, this transient technique allows the characterization of oxide traps separately in the presence of interface traps, Oxide traps created by three different stress methods, channel Fowler-Nordheim (F-N) stress, hot electron stress and hot hole stress, are characterized, By varying the gate bias in the detrapping phase and the drain bias in the measurement phase, the field dependence of oxide charge detrapping and the spatial distribution of oxide traps in the channel direction can be obtained, Our results show that 1) the subthreshold current transient follows a power-law time-dependence at a small charge detrapping field, 2) while the hot hole stress generated oxide traps have a largest density, their spatial distribution in the channel is narrowest as compared to the other two stresses, and 3) the hot hole stress created oxide charges exhibit a shortest effective detrapping time-constant.
Field and temperature effects on oxide charge detrapping in a metal-oxide-semiconductor field effect transistor by measuring a subthreshold current transient
(1997-08-25)
Chiang, LP
;
Zous, NK
;
Wang, TH
;
Chang, TE
;
Shen, KY
A technique to characterize oxide charge detrapping in a Fowler-Nordheim stressed n-metal-oxide-semiconductor field effect transistor is proposed. This technique consist of two alternating phases, an oxide charge detrapping phase and a subthreshold current measurement phase. An analytical model relating a subthreshold current transient to oxide charge density and detrapping time constants was derived. By varying the gate bias in the detrapping phase and the ambient temperature, the field and temperature dependences of oxide charge detrapping can be obtained from the subthreshold current transients measured. (C) 1997 American Institute of Physics.
Field enhanced oxide charge detrapping in n-MOSFET's
(1996)
Wang, TH
;
Chang, TE
;
Chiang, LP
;
Huang, C
;
電子工程學系及電子研究所
Investigation of oxide charge trapping and detrapping in a MOSFET by using a GIDL current technique
(1998-07-01)
Wang, TH
;
Chang, TE
;
Chiang, LP
;
Wang, CH
;
Zous, NK
We proposed a new measurement technique to investigate oxide charge trapping and detrapping in a hot carrier stressed n-MOSFET by measuring a GIDL current transient. This measurement technique is based on the concept that in a MOSFET the Si surface field and thus GIDL current vary with oxide trapped charge. By monitoring the temporal evolution of GIDL current, the oxide charge trapping/detrapping characteristics can be obtained. An analytical model accounting for the time-dependence of an oxide charge detrapping induced GIDL current transient was derived, A specially designed measurement consisting of oxide trap creation, oxide trap filling with electrons or holes and oxide charge detrapping was performed. Two hot carrier stress methods, channel hot electron injection and band-to-band tunneling induced hot hole injection, were employed in this work, Both electron detrapping and hole detrapping induced GIDL current transients were observed in the same device. The time-dependence of the transients indicates that oxide charge detrapping is mainly achieved via field enhanced tunneling. In addition, we used this technique to characterize oxide trap growth in the two hot carrier stress conditions. The result reveals that the hot hole stress is about 10(4) times more efficient in trap generation than the hot electron stress in terms of injected charge.
Investigation of oxide charge trapping and detrapping in a n-MOSFET
(1997)
Wang, TH
;
Chang, TE
;
Chiang, LP
;
Zous, NK
;
Huang, C
Oxide hole and electron trapping/detrapping characteristics in a hot carrier stressed n-MOSFET were investigated by monitoring the temporal evolution of band-to-band tunneling current. Both the hole and electron detrapping induced GIDL current transients were observed for the first time in the same device. The obtained field dependence of oxide charge detrapping time indicates that trapezoidal barrier tunneling is a major mechanism in both hole and electron detrapping. A trap assisted sequential tunneling model for hole detrapping was used to match the measured trap time constants.
Mechanisms and characteristics of oxide charge detrapping in n-MOSFET's
(1996)
Wang, TH
;
Chang, TE
;
Chiang, LP
;
Huang, CM
;
Guo, JC
Valence-band tunneling enhanced hot carrier degradation in ultra-thin oxide nMOSFETs
(2000)
Tsai, CW
;
Gu, SH
;
Chiang, LP
;
Wang, TH
;
Liu, YC
Enhanced hot carrier degradation with stress V-g in the valence-band tunneling regime is observed. This degradation is attributed to channel hole creation by valence-band electron tunneling. The created holes provide for Auger recombination with electrons in the channel and thus increase hot electron energy. The valence-band tunneling enhanced hot carrier degradation becomes more serious as gate oxide thickness is reduced. In ultra-thin gate oxide nMOSFETs, our result shows that the valence-band tunneling enhanced degradation, as opposed to max. Tb stress induced degradation, exhibits positive dependence on substrate bias. This phenomenon may cause a severe reliability issue in positively biased substrate or floating substrate devices.
Voltage scaling and temperature effects on drain leakage current degradation in a hot carrier stressed n-MOSFET
(1998)
Wang, TH
;
Hsu, CF
;
Chiang, LP
;
Zous, NK
;
Chao, TS
Drain leakage current degradation at zero V-gs in a hot carrier stressed n-MOSFET is measured and modeled. The dependences of drain leakage current on supply voltage and temperature are characterized. In modeling, various drain leakage current mechanisms including drain-to-source subthreshold leakage current, band-to-band tunneling current and interface trap assisted leakage current are taken into account. Our result shows that interface trap induced leakage current appears to be a dominant drain leakage mechanism as the supply voltage is scaled below 3.0V. Drain leakage current degradation by orders of magnitude has been observed due to hot carrier stress.