Browsing by Author "Chou, MF"
Now showing 1 - 4 of 4
- Results Per Page
- Sort Options
Item type:Item, A CMOS low-noise amplifier for ultra wideband wireless applications(2005-11-01) ;Chou, MF ;Wuen, WS ;Wu, CC ;Wen, KAChang, CYA CMOS low noise amplifier (LNA) for low-power ultrawideband (UWB) wireless applications is presented. To achieve low power consumption and wide operating bandwidth, the proposed LNA employing stagger tuning technique consists of two stacked common-source stages with different resonant frequencies. This work is implemented in 0.18-mu m CMOS process and shows a 2.4-9.4-GHz bandwidth. The amplifier provides a maximum forward gain (S-21) of 10.9 dB while drawing 7.1 mW from a 1.8-V supply. A noise figure as low as 4.1 dB and an IIP3 of -3.5 dBm have been demonstrated.Item type:Item, A low power CMOS low noise amplifier for ultra-wideband wireless applications(2005) ;Wu, CC ;Chou, MF ;Wuen, WS ;Wen, KA電子工程學系及電子研究所A CMOS low noise amplifier (LNA) for low-power ultra-wideband (UNVB) wireless applications is presented. To achieve low power consumption and wide operating bandwidth, the proposed LNA employing stagger tuning technique consists of two stacked common-source stages with different resonance frequencies. This work is implemented in 0.18-mu m CMOS process and shows a 2.6-9.2-GRz bandwidth. The amplifier provides a maximum forward gain (S(21)) of 10.9 dB while drawing 7.1 mW from a 1.8-V supply. A noise figure as low as 3.5 dB and an IIP3 of -5.1 dBm have been demonstrated. In this paper, design optimization for the power-constrained stacked amplifiers in wide bandwidth applications is also presented.Item type:Item, Dual-band mixer design(2005-06-01) ;Chou, MF ;Wen, KA ;Chang, CY ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsThis paper presents a dual-band mixer equipped with a dual-band load using current combine technique to minimize chip area by sharing inductors for each frequency band. A systematic design methodology for the current combine load based on parasitic effect considerations is also developed. By following the proposed design procedure, the load inductance and combine capacitance for the dual-band mixer can be easily determined. A 2.4/5.2-GHz CMOS mixer design has been implemented to demonstrate the feasibility of the design technique.Item type:Item, Low power CMOS wideband receiver design(2004) ;Sung, CC ;Chou, MF ;Wu, CC ;Chen, CSWen, KAA low power CMOS receiver for ultra-wideband (UWB) wireless applications is presented. The low-noise amplifier (LNA) building block employing stagger tuning technique consists of two common-source stages with different resonance frequencies to achieve low power consumption and wide operating bandwidth. In addition, the variable gain amplifier (VGA) follows the passive mixer employs a novel wide-range pseudo-exponential circuit topology. This work was implemented in 0.18-mu m CMOS process exhibits 280-MHz bandwidth and draws 27.4 mA on average from a 1.8-V supply. The receiver has a minimum noise figure of 2.6 dB, and maximum IIP3 of -33 dBm across the UWB group 1 bands.