Browsing by Author "Hsieh, Chih-Ren"

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Characteristics of the Fluorinated High-k Inter-Poly Dielectrics
(2010-12-01)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Lu, Kwung-Wen
;
Lin, Gray
;
Lou, Jen-Chung
In this letter, the reliabilities and insulating characteristics of the fluorinated aluminum oxide (Al(2)O(3)) and hafnium oxide (HfO(2)) inter-poly dielectric (IPD) are studied for the first time. Compared with the IPDs without fluorine incorporation, the results clearly indicate that fluorine incorporation process is effective to improve the insulating characteristics of both the Al(2)O(3) and HfO(2) IPDs, mainly ascribed to the trap density reduction and the smooth interface. Although HfO(2) possesses higher dielectric constant to increase the gate coupling ratio, the results apparently indicate that the fluorine incorporation process is more effective to improve the dielectric characteristics of the Al(2)O(3) IPD than the HfO(2) IPD.
Characteristics of the SiN Uniaxial Strained NMOSFET with Channel Fluorine Implantation
(2012)
Chen, Yung-Yu
;
Hsieh, Chih-Ren
;
Chiu, Fang-Yu
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Channel fluorine implantation (CFI) has been successfully integrated with silicon nitride contact etch stop layer (SiN CESL) to further improve the channel hot electron stress (CHES) and constant voltage stress (CVS) reliability of n-channel metal-oxide-semiconductor field-effect-transistor with HfO2/SiON gate stack. Although the improvement of transconductance, drain current and subthreshold swing due to the fluorine passivation is screened out by the effect of uniaxial tensile strain, the result clearly demonstrates that integrating the CFI process in the SiN CESL-strained device can further suppress the CHES- and CVS-induced threshold voltage shift.
Charge Trapping and Detrapping Behavior of Fluorinated HfO(2)/SiON Gate Stacked nMOSFET
(2010-11-01)
Chen, Yung-Yu
;
Hsieh, Chih-Ren
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The charge trapping and detrapping characteristics of the fluorinated hafnium oxide/ oxynitride (HfO(2)/SiON) gate stack are investigated. Although incorporation of fluorine in the bulk stack had been proven to eliminate both bulk and interface trap densities due to Hf-F and Si-F bond formation, respectively, the effective trapping barrier of the device with fluorine incorporation (1.29 eV) is deeper than without fluorine incorporation (1.13 eV), indicating that the detrapping ability of the fluorinated devices may limit future fluorine process applications.
Charge Trapping and Detrapping Behavior of Fluorinated HfO2/SiON Gate Stacked nMOSFET
(2010-11-01)
Chen, Yung-Yu
;
Hsieh, Chih-Ren
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The charge trapping and detrapping characteristics of the fluorinated hafnium oxide/ oxynitride (HfO2/SiON) gate stack are investigated. Although incorporation of fluorine in the bulk stack had been proven to eliminate both bulk and interface trap densities due to Hf-F and Si-F bond formation, respectively, the effective trapping barrier of the device with fluorine incorporation (1.29 eV) is deeper than without fluorine incorporation (1.13 eV), indicating that the detrapping ability of the fluorinated devices may limit future fluorine process applications.
Constant voltage stress induced charge trapping and detrapping characteristics of the Si(3)N(4) uniaxial strained n-channel metal-oxide-semiconductor field-effect-transistor with fluorinated HfO(2)/SiON gate stack
(2011-01-17)
Chen, Yung-Yu
;
Hsieh, Chih-Ren
;
Chiu, Fang-Yu
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Charge trapping and detrapping characteristics of Si(3)N(4) contact etch stop layer (SiN CESL) uniaxial strained n-channel metal-oxide-semiconductor field-effect-transistor (nMOSFET) with fluorinated HfO(2)/SiON gate stack have been investigated for the first time. Smaller threshold voltage shift can consequently obtain for the SiN CESL strained nMOSFET with fluorinated HfO(2)/SiON gate stack, primarily due to passivation of oxygen vacancies and dangling bonds by either nitrogen or fluorine atoms. However, the SiN CESL strained nMOSFET with fluorinated gate stack inevitably exhibits less charge detrapping ratio, which means greater part of stress-induced charges would remain in the gate stack after nitrogen or fluorine incorporation, respectively. (c) 2011 American Institute of Physics. [doi:10.1063/1.3541878]
Constant voltage stress induced charge trapping and detrapping characteristics of the Si3N4 uniaxial strained n-channel metal-oxide-semiconductor field-effect-transistor with fluorinated HfO2/SiON gate stack
(2011-01-17)
Chen, Yung-Yu
;
Hsieh, Chih-Ren
;
Chiu, Fang-Yu
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Charge trapping and detrapping characteristics of Si3N4 contact etch stop layer (SiN CESL) uniaxial strained n-channel metal-oxide-semiconductor field-effect-transistor (nMOSFET) with fluorinated HfO2/SiON gate stack have been investigated for the first time. Smaller threshold voltage shift can consequently obtain for the SiN CESL strained nMOSFET with fluorinated HfO2/SiON gate stack, primarily due to passivation of oxygen vacancies and dangling bonds by either nitrogen or fluorine atoms. However, the SiN CESL strained nMOSFET with fluorinated gate stack inevitably exhibits less charge detrapping ratio, which means greater part of stress-induced charges would remain in the gate stack after nitrogen or fluorine incorporation, respectively. (c) 2011 American Institute of Physics. [doi:10.1063/1.3541878]
Effect of fluorinated silicate glass passivation layer on electrical characteristics and dielectric reliabilities for the HfO(2)/SiON gate stacked nMOSFET
(2010-11-01)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Lou, Jen-Chung
;
電機工程學系
;
Department of Electrical and Computer Engineering
The superior characteristics of the fluorinated hafnium oxide/oxynitride (HfO(2)/SiON) gate dielectric are investigated comprehensively. Fluorine is incorporated into the gate dielectric through fluorinated silicate glass (FSG) passivation layer to form fluorinated HfO(2)/SiON dielectric. Fluorine incorporation has been proven to eliminate both bulk and interface trap densities due to Hf-F and Si-F bonds formation, which can strongly reduce trap generation as well as trap-assisted tunneling during subsequently constant voltage stress, and results in improved electrical characteristics and dielectric reliabilities. The results clearly indicate that the fluorinated HfO(2)/SiON gate dielectric using FSG passivation layer becomes a feasible technology for future ultrathin gate dielectrics applications. (C) 2010 Elsevier B.V. All rights reserved.
Effect of fluorinated silicate glass passivation layer on electrical characteristics and dielectric reliabilities for the HfO2/SiON gate stacked nMOSFET
(2010-11-01)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Lou, Jen-Chung
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The superior characteristics of the fluorinated hafnium oxide/oxynitride (HfO2/SiON) gate dielectric are investigated comprehensively. Fluorine is incorporated into the gate dielectric through fluorinated silicate glass (FSG) passivation layer to form fluorinated HfO2/SiON dielectric. Fluorine incorporation has been proven to eliminate both bulk and interface trap densities due to Hf-F and Si-F bonds formation, which can strongly reduce trap generation as well as trap-assisted tunneling during subsequently constant voltage stress, and results in improved electrical characteristics and dielectric reliabilities. The results clearly indicate that the fluorinated HfO2/SiON gate dielectric using FSG passivation layer becomes a feasible technology for future ultrathin gate dielectrics applications. (C) 2010 Elsevier B.V. All rights reserved.
Effect of interfacial fluorination on the electrical properties of the inter-poly high-k dielectrics
(2011-06-01)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Lu, Kwung-Wen
;
Lin, Gray
;
Lou, Jen-Chung
In this paper, the reliabilities and insulating characteristics of the fluorinated aluminum oxide (Al(2)O(3)) and hafnium oxide (HfO(2)) inter-poly dielectric (IPD) are studied. Interface fluorine passivation has been demonstrated in terminating dangling bonds and oxygen vacancies, reducing interfacial re-oxidation and smoothing interface roughness, and diminishing trap densities. Compared with the IPDs without fluorine incorporation, the results clearly indicate that fluorine incorporation process is effective to improve the insulating characteristics of both the Al(2)O(3) and HfO(2) IPDs. Moreover, fluorine incorporation will also improve the dielectric quality of the interfacial layer. Although HfO(2) possesses higher dielectric constant to increase the gate coupling ratio, the results also demonstrate that fluorination of the Al(2)O(3) dielectric is more effective to promote the IPD characteristics than fluorination of the HfO(2) dielectric. For future stack-gate flash memory application, the fluorinated Al(2)O(3) IPD undoubtedly possesses higher potential to replace current ONO IPD than the fluorinated HfO(2) IPD due to superior insulating properties. (c) 2010 Elsevier B.V. All rights reserved.
Enhanced data retention characteristic on SOHOS-type nonvolatile flash memory with CF4-plasma-induced deep electron trap level
(2011)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Lin, Wen-Shin
;
Lin, Gray
;
Lou, Jen-Chung
The improved data retention characteristics of Polysilicon-oxide-hafnium oxide-oxide-silicon (SOHOS) type nonvolatile memory were obtained by post-HfO2 trapping layer deposition tetrafluoromethane (CF4) plasma treatment. The memory characteristics such as program/erase speed, retention and endurance were studied comprehensively. That fluorine atoms incorporated into Hf-based high-k material eliminate shallow trap defect level effectively and remain deeper trap level. Although the shallow traps of the HfOF trapping layer SOHOS memory have passivated, it doesn't deteriorate the program/erase speed obviously and retention characteristic was then improved because of deeper electron storage level. The results clearly indicate CF4 plasma treatment-induced deep electron storage level is a feasible technology for future SOHOS-type nonvolatile flash memory application.
HfO2 Inter-Poly Dielectric Characteristics with Interface Fluorine Passivation
(2009)
Chen, Yung-Yu
;
Hsieh, Chih-Ren
;
Lu, Kwung-Wen
;
Lou, Jen-Chung
;
電子工程學系及電子研究所
In this paper, the reliabilities and insulating characteristics of the fluorinated hafnium oxide (HIO2) inter-poly dielectric (IPD) through fluorine ion implantation are studied for the first time. HfO2 IPD characteristics are strongly dependent on the fluorine implantation dosage. Due to the terminating dangling bonds and oxygen vacancies, reducing interface oxidation and smoothing interface roughness, optimized fluorinated HfO2 can be used to drastically improve the IPD reliabilities; consequently, this study concludes that fluorinated HfO2 IPD is suitable for mass production applications in the future stacked-gate flash memory technology.
Improved performance and reliability for metal-oxide-semiconductor field-effect-transistor with fluorinated silicate glass passivation layer
(2010-01-11)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Lou, Jen-Chung
;
電機工程學系
;
Department of Electrical and Computer Engineering
The superior characteristics of the fluorinated HfO(2)/SiON gate dielectric are investigated comprehensively. Fluorine is incorporated into the gate dielectric through fluorinated silicate glass (FSG) passivation layer to form fluorinated HfO(2)/SiON dielectric. Fluorine incorporation has been proved to eliminate both bulk and interface trap densities due to Hf-F and Si-F bonds formation, which can strongly reduce trap generation as well as trap-assisted tunneling during subsequently constant voltage stress, and results in improved electrical characteristics and dielectric reliabilities. The results clearly indicate that the fluorinated HfO(2)/SiON gate dielectric using FSG passivation layer becomes a feasible technology for future ultrathin gate dielectric applications.
Reliability Improvement of HfO(2)/SiON Gate Stacked nMOSFET using Fluorinated Silicate Glass Passivation Layer
(2009-01-01)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Chung, Jer-Fu
;
Lou, Jen-Chung
;
電子工程學系及電子研究所
In this paper, the reliability of the fluorinated hafnium oxide (HfO(2)) gate dielectric using novel and CMOS compatible fluorinated silicate glass (FSG) process has been studied comprehensively for the first time. Due to dangling bonds and oxygen vacancies recovery by the fluorine atoms, higher transconductance, smaller stress-induced threshold voltage and interface state degradation are therefore obtained for the fluorinated HfO(2)/SiON gate stack.
Reliability Improvement of HfO2/SiON Gate Stacked nMOSFET using Fluorinated Silicate Glass Passivation Layer
(2009-01-01)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Chung, Jer-Fu
;
Lou, Jen-Chung
;
電子工程學系及電子研究所
In this paper, the reliability of the fluorinated hafnium oxide (HfO2) gate dielectric using novel and CMOS compatible fluorinated silicate glass (FSG) process has been studied comprehensively for the first time. Due to dangling bonds and oxygen vacancies recovery by the fluorine atoms, higher transconductance, smaller stress-induced threshold voltage and interface state degradation are therefore obtained for the fluorinated HfO2/SiON gate stack.
Stress immunity enhancement of the SiN uniaxial strained n-channel metal-oxide-semiconductor field-effect-transistor by channel fluorine implantation
(2012-06-01)
Chen, Yung-Yu
;
Hsieh, Chih-Ren
;
Chiu, Fang-Yu
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Channel fluorine implantation (CFI) has been successfully integrated with silicon nitride contact etch stop layer (SiN CESL) to investigate electrical characteristics and stress reliabilities of the n-channel metal-oxide-semiconductor field-effect-transistor (nMOSFET) with HfL2/SiON gate dielectric. Although fluorine incorporation had been used widely to improve device characteristics, however, nearly identical transconductance, subthreshold swing and drain current of the SIN CESL strained nMOSFET combining the CFI process clearly indicates that stress-induced electron mobility enhancement does not affect by the fluorine incorporation. On the other hand, the SiN CESL strained nMOSFET with fluorine incorporation obviously exhibits superior stress reliabilities due to stronger Si-F/Hf-F bonds formation. The channel hot electron stress and constant voltage stress induced threshold voltage shift can be significantly suppressed larger than 26% and 15%, respectively. The results clearly demonstrate that combining the SiN CESL strained nMOSFET with fluorinated gate dielectric using CFI process becomes a suitable technology to further enhance stress immunity. (C) 2011 Elsevier Ltd. All rights reserved.