Browsing by Author "Hsieh, Tien-Yu"

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Abnormal temperature-dependent floating-body effect on Hot-Carrier Degradation in PDSOI n-MOSFETs
(2014-12-01)
Liu, Kuan-Ju
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Chang, Ting-Chang
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Yang, Ren-Ya
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Chen, Ching-En
;
Ho, Szu-Han
This letter investigates abnormal degradation behavior after hot-carrier stress in partially-depleted silicon-oninsulator n-channel metal-oxide-semiconductor field effect transistors. It is found that the hot-carrier-induced degradation under floating body (FB) operation is more serious than that under grounded body (GB) operation due to the floating body effect (FBE). Furthermore, the degradation is independent on temperature under GB operation, because impact ionization is virtually independent on temperature under large VD. However, the degradation under FB operation becomes less serious with increasing temperature. This is due to a smaller source/body PN junction band offset at a high temperature, which causes fewer accumulated holes at the body terminal and reduces the FBE. (C) 2014 Elsevier B.V. All rights reserved.
Analysis of Degradation Mechanism in SONOS-TFT Under Hot-Carrier Operation
(2010-12-01)
Chen, Te-Chih
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Chang, Ting-Chang
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Chen, Shih-Ching
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Hsieh, Tien-Yu
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Jian, Fu-Yen
This letter investigates the degradation mechanism of polycrystalline silicon thin-film transistors with a silicon-oxide-nitride-oxide-silicon structure under OFF-state stress. During the electrical stress, the hot hole generated from band-to-band tunneling process will inject into gate dielectric, and the significant ON-state degradation (more than 1 order) indicates that the interface states are accompanied with hot-hole injection. In addition, the asymmetric I-V characteristics indicate that the interface states are located near the drain side. Moreover, the ISE-TCAD simulation tool was utilized to model the degradation mechanism and analyze trap states distribution. Although both the vertical and lateral electrical fields are factors for degradation and hot-hole injection, the degradation is mainly affected by the lateral electrical field over a critical point.
Analysis of Electrical Characteristics and Reliability Change of Zinc-Tin-Oxide Thin-Film Transistors by Photo-Thermal Treatment
(2013)
Chen, Yu-Chun
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Chang, Ting-Chang
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Li, Hung-Wei
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Chung, Wan-Fang
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Hsieh, Tien-Yu
This study investigates the influence of a photo-thermal treatment on the electrical characteristics and bias-induced instability of amorphous Zn-Sn-O thin film transistors. Sequences of measurements made in both vacuum and oxygen ambient reveal the most pronounced threshold voltage (V-T) shift, i.e., the highest sensitivity of oxygen, occurs in a device with photo-thermal-treatment. After gate-bias stress in vacuum, the treated device shows less V-T shift than that untreated, which can be attributed to residual adsorbed gas molecules on the backchannel. Thus, the proposed photo-thermal-treatment should be conducted before depositing a passivation layer to increase the reliability of devices after stress. (c) 2013 The Electrochemical Society. All rights reserved.
Dependence of Light-Accelerated Instability on Bias and Environment in Amorphous Indium-Gallium-Zinc-Oxide Thin Film Transistors
(2013)
Chen, Yu-Chun
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Chang, Ting-Chang
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Li, Hung-Wei
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Chung, Wan-Fang
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Hsieh, Tien-Yu
This study examines the dependence of light-accelerated instability on bias and environment in amorphous indium-gallium-zinc-oxide thin film transistors. When device is in vacuum ambient, the threshold voltage of device after negative gate bias illumination stress (NBIS) showed bias-dependent electrical degradation behavior. However, experimental results show the degradation of electrical characteristic in a-IGZO devices does not only rely on the charge trapping mechanism for NBIS. During NBIS in oxygen, moisture-simulated and atmosphere ambient, the negative shift in electrical characteristic is suppressed when compared to that in vacuum. This implies that the adsorbent gas species in the surrounding environment dominates the electrical characteristic degradation of devices during NBIS, which leading the change of dominant mechanism from photon-created carrier trapping to adsorbed/desorbed gas phenomenon. (C) 2013 The Electrochemical Society. All rights reserved.
Effect of mechanical-strain-induced defect generation on the performance of flexible amorphous In-Ga-Zn-O thin-film transistors
(2016-12)
Liao, Po-Yung
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Chang, Ting-Chang
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Su, Wan-Ching
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Chen, Yu-Jia
;
Chen, Bo-Wei
In this study, we investigate the effect of mechanical strain on the performance of flexible amorphous In-Ga-Zn-O (a-.InGaZnO) thin-film transistors. Drain current-gate voltage (ID-VG) and capacitance-voltage (C-V) transfer curves are measured to analyze the degradation behavior. The ID-VG characteristic exhibits a clear negative shift under mechanical strain regardless of the tension or compression state. In addition, the C-V characteristic curves show a leftward shift with extra distortion or stretching out under mechanical strain. This indicates that InGaZnO generates additional defects under this mechanical strain, a phenomenon that can be attributed to the generation of mechanical-strain-induced oxygen vacancies on the flexible a-InGaZnO TFTs. (C) 2016 The Japan Society of Applied Physics.
Hot carrier effect on gate-induced drain leakage current in high-k/metal gate n-channel metal-oxide-semiconductor field-effect transistors
(2011-07-04)
Dai, Chih-Hao
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Chang, Ting-Chang
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Chu, Ann-Kuo
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Kuo, Yuan-Jui
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Ho, Szu-Han
This paper investigates the channel hot carrier stress (CHCS) effects on gate-induced drain leakage (GIDL) current in high-k/metal-gate n-type metal-oxide-semiconductor field effect transistors. It was found that the behavior of GIDL current during CHCS is dependent upon the interfacial layer (IL) oxide thickness of high-k/metal-gate stacks. For a thinner IL, the GIDL current gradually decreases during CHCS, a result contrary to that found in a device with thicker IL. Based on the variation of GIDL current at different stress conditions, the trap-assisted band-to-band hole injection model is proposed to explain the different behavior of GIDL current for different IL thicknesses. (C) 2011 American Institute of Physics. [doi:10.1063/1.3608241]
Hot Carrier Effect on Gate-Induced Drain Leakage Current in n-MOSFETs with HfO2/Ti1-xNx Gate Stacks
(2012)
Dai, Chih-Hao
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Chang, Ting-Chang
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Chu, Ann-Kuo
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Kuo, Yuan-Jui
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Ho, Szu-Han
"This paper investigates the effect of channel hot carrier stress (CHCS) on gate-induced drain leakage (GIDL) current in n-type metal-oxide-semiconductor field effect transistor (n-MOSFETs) with HfO2/Ti1-xNx gate stacks. It was found that the behavior of GIDL current during CHCS has dependence with the interfacial layer (IL) oxide thickness of high-k/metal gate stacks. As IL thickness becomes thinner, the GIDL current has a gradual decrease during CHCS, which is contrary to the result of thick-oxide IL devices. Based on the variation of GIDL current (Delta I-GIDL) in different stress voltage across gate and drain terminals, trap-assisted band to band holes injection model was proposed to explain the different behavior of GIDL current for different IL thickness. Furthermore, we also investigated the impact of different Ti1-xNx composition of metal gate electrode on the Delta I-GIDL after CHCS, and observed that the magnitude of Delta I-GIDL decreases with the increase of nitride ratio. This is due to the fact that nitride atoms diffusing from the metal gate fill up oxygen vacancies, and reduce the concentration of traps in high-k dielectric. (C) 2012 The Electrochemical Society. [DOI: 10.1149/2.001206esl] All rights reserved."
Impact of repeated uniaxial mechanical strain on flexible a-IGZO thin film transistors with symmetric and asymmetric structures
(2017-06-26)
Liao, Po-Yung
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Chang, Ting-Chang
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Su, Wan-Ching
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Chen, Bo-Wei
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Chen, Li-Hui
This letter investigates repeated uniaxial mechanical stress-induced degradation behavior in flexible amorphous In-Ga-Zn-O thin-film transistors (TFTs) of different geometric structures. Two types of via-contact structure TFTs are investigated: symmetrical and UI structure (TFTs with Iand U-shaped asymmetric electrodes). After repeated mechanical stress, I-V curves for the symmetrical structure show a significant negative threshold voltage (VT) shift, due to mechanical stress-induced oxygen vacancy generation. However, degradation in the UI structure TFTs after stress is a negative VT shift along with the parasitic transistor characteristic in the forward-operation mode, with this hump not evident in the reverse-operation mode. This asymmetrical degradation is clarified by the mechanical strain simulation of the UI TFTs. Published by AIP Publishing.
Influence of an anomalous dimension effect on thermal instability in amorphous-InGaZnO thin-film transistors
(2014-10-21)
Liu, Kuan-Hsien
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Chang, Ting-Chang
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Chou, Wu-Ching
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Chen, Hua-Mao
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Tsai, Ming-Yen
This paper investigates abnormal dimension-dependent thermal instability in amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors. Device dimension should theoretically have no effects on threshold voltage, except for in short channel devices. Unlike short channel draininduced source barrier lowering effect, threshold voltage increases with increasing drain voltage. Furthermore, for devices with either a relatively large channel width or a short channel length, the output drain current decreases instead of saturating with an increase in drain voltage. Moreover, the wider the channel and the shorter the channel length, the larger the threshold voltage and output on-state current degradation that is observed. Because of the surrounding oxide and other thermal insulating material and the low thermal conductivity of the IGZO layer, the self-heating effect will be pronounced in wider/shorter channel length devices and those with a larger operating drain bias. To further clarify the physical mechanism, fast ID-VG and modulated peak/base pulse time ID-VD measurements are utilized to demonstrate the self-heating induced anomalous dimension-dependent threshold voltage variation and on-state current degradation. (C) 2014 AIP Publishing LLC.
Investigating Degradation Behavior of InGaZnO Thin-Film Transistors induced by Charge-Trapping Effect under DC and AC Gate-Bias Stress
(2012)
Hsieh, Tien-Yu
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Chang, Ting-Chang
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Chen, Te-Chih
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Tsai, Ming-Yen
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Chen, Yu-Te
This paper investigates the degradation mechanism of amorphous InGaZnO thin-film transistors under DC and AC gate bias stress. Comparing the degradation behavior at equal accumulated effective stress time, more pronounced threshold voltage shift under AC positive gate bias stress in comparison with DC stress indicates extra electron-trapping phenomenon occurs in the duration of rising/falling time in pulse. Contrarily, illuminated AC negative gate bias stress exhibits much less threshold voltage shift than DC stress, which suggesting the photo-generated hole does not has sufficient time to drift to the interface of IGZO/gate insulator and causes hole-trapping under AC operation. Since the evolution of threshold voltage fits the stretched-exponential equation well, the different degradation tendencies under DC/AC stress can be attributed to the different electron-and hole-trapping efficiencies, and this is further verified by varying pulse waveform.
Investigating the degradation behavior caused by charge trapping effect under DC and AC gate-bias stress for InGaZnO thin film transistor
(2011-07-11)
Chen, Te-Chih
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Chang, Ting-Chang
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Hsieh, Tien-Yu
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Lu, Wei-Siang
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Jian, Fu-Yen
This letter investigates the degradation mechanism of amorphous indium-gallium-zinc oxide thin-film transistors under gate-bias stress. The larger V(t) shift under positive AC gate-bias stress when compared to DC operation indicates that an extra electron trapping mechanism occurs during rising/falling time during the AC pulse period. In contrast, the degradation behavior under illuminated negative gate-bias stress exhibits the opposite degradation tendency. Since electron and hole trapping are the dominant degradation mechanisms under positive and illuminated negative gate-bias stress, respectively, the different degradation tendencies under AC/DC operation can be attributed to the different trapping efficiency of electrons and holes. (C) 2011 American Institute of Physics. [doi: 10.1063/1.3609873]
Investigation of channel width-dependent threshold voltage variation in a-InGaZnO thin-film transistors
(2014-03-31)
Liu, Kuan-Hsien
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Chang, Ting-Chang
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Wu, Ming-Siou
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Hung, Yi-Syuan
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Hung, Pei-Hua
This Letter investigates abnormal channel width-dependent threshold voltage variation in amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors. Unlike drain-induced source barrier lowering effect, threshold voltage increases with increasing drain voltage. Furthermore, the wider the channel, the larger the threshold voltage observed. Because of the surrounding oxide and other thermal insulating material and the low thermal conductivity of the IGZO layer, the self-heating effect will be pronounced in wider channel devices and those with a larger operating drain bias. To further clarify the physical mechanism, fast IV measurement is utilized to demonstrate the self-heating induced anomalous channel width-dependent threshold voltage variation. (C) 2014 AIP Publishing LLC.
Investigation of gate-bias stress and hot-carrier stress-induced instability of InGaZnO thin-film transistors under different environments
(2013-09-01)
Hsieh, Tien-Yu
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Chang, Ting-Chang
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Chen, Te-Chih
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Tsai, Ming-Yen
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Chen, Yu-Te
This paper investigates the temperature and ambiance effects on various reliability issues for InGaZnO thin film transistors with an organic passivation layer. Hot-carrier stress and gate-bias stress are carried out under different environmental temperatures and ambient gases. The device exhibits relatively good stability under room temperture, whereas high temperature enhances degradation. Futhermore, different degradation behaviors after gate-bias stress in atmosphere and in vacuum can be attributed to gas adsorption/desorption-induced instability. Moreover, capacitance-voltage measurement techinique is utilized to analyze the degradation mechanism and to extract the density of state (DOS). The result reveals that the threshold voltage shift after both hot-carrier and gate-bias stress originates from the charge-trapping effect at the interface of gate insulator and active layer, with the extra trap states generated during stress responsible for C-V curve distortion. In addition, the asymmetric degradation behavior of gate-to-drain capacitance (Cgd) and gate-to-source capacitance (Cgs) indicates that trap states are generated near the drain side. (C) 2012 Elsevier B.V. All rights reserved.
Investigation of on-current degradation behavior induced by surface hydrolysis effect under negative gate bias stress in amorphous InGaZnO thin-film transistors
(2014-03-10)
Liu, Kuan-Hsien
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Chang, Ting-Chang
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Chang, Kuan-Chang
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Tsai, Tsung-Ming
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Hsieh, Tien-Yu
This study investigates the electrical instability under negative gate bias stress (NGBS) induced by surface hydrolysis effect. Electrical characteristics exhibit instability for amorphous InGaZnO (a-IGZO) Thin Film Transistors (TFTs) under NGBS, in which on-current degradation and current crowding phenomenon can be observed. When the negative gate bias is applied on the TFT, hydrogen ions will dissociate from ZnO-H bonds and the dissociated hydrogen ions will cause electrical instability under NGBS. The ISE-Technology Computer Aided Design simulation tool and moisture partial pressure modulation measurement are utilized to clarify the anomalous degradation behavior. (C) 2014 AIP Publishing LLC.
NBTI Degradation in LTPS TFTs Under Mechanical Tensile Strain
(2011-07-01)
Lin, Chia-Sheng
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Chen, Ying-Chung
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Chang, Ting-Chang
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Jian, Fu-Yen
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Hsu, Wei-Che
This letter investigates the negative-bias temperature instability (NBTI) degradation of p-channel low-temperature polycrystalline-silicon thin-film transistors (LTPS TFTs) under mechanical tensile stress. Experimental results reveal that the interface state density N(it) and grain boundary trap density N(trap) of tensile-strained LTPS TFTs are more pronounced than those of unstrained LTPS TFTs. Extracted density of states and conduction activation energy E(a) both show increases due to the strained Si-Si bonds, which implies that strained Si-Si bonds are able to react with dissociated H during NBTI stress. Therefore, NBTI degradation is more significant after tensile strain than in an unstrained condition.
The effect of asymmetrical electrode form after negative bias illuminated stress in amorphous IGZO thin film transistors
(2017-03-06)
Su, Wan-Ching
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Chang, Ting-Chang
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Liao, Po-Yung
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Chen, Yu-Jia
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Chen, Bo-Wei
This paper investigates the degradation behavior of InGaZnO thin film transistors (TFTs) under negative bias illumination stress (NBIS). TFT devices with two different source and drain layouts were exanimated: one having a parallel format electrode and the other with UI format electrode. UI means that source/drain electrodes shapes is defined as a forked-shaped structure. The I-V curve of the parallel electrode exhibited a symmetric degradation under forward and reverse sweeping in the saturation region after 1000 s NBIS. In contrast, the I-V curve of the UI electrode structure under similar conditions was asymmetric. The UI electrode structure also shows a stretch-out phenomenon in its C-V measurement. Finally, this work utilizes the ISE-Technology Computer Aided Design (ISE-TCAD) system simulations, which simulate the electron field and IV curves, to analyze the mechanisms dominating the parallel and UI device degradation behaviors. Published by AIP Publishing.
The effect of asymmetrical electrode form after negative bias illuminated stress in amorphous IGZO thin film transistors (vol 110, 103502, 2017)
(2017-04-10)
Su, Wan-Ching
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Chang, Ting-Chang
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Liao, Po-Yung
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Chen, Yu-Jia
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Chen, Bo-Wei
The effect of device electrode geometry on performance after hot-carrier stress in amorphous In-Ga-Zn-O thin film transistors with different via-contact structures
(2017-05-15)
Liao, Po-Yung
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Chang, Ting-Chang
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Chen, Yu-Jia
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Su, Wan-Ching
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Chen, Bo-Wei
In this letter, the effects of hot carriers on amorphous In-Ga-Zn-O thin film transistors (TFTs) of different geometric structures were investigated. Three types of via-contact structure TFTs are used in this experiment, defined as source-drain large (SD large), source-drain normal (SD normal), and fork-shaped. After hot-carrier stress, the I-V curves of both SD normal and fork-shaped TFTs with U-shaped drains show a threshold voltage shift along with the parasitic transistor characteristic in the reverse-operation mode. Asymmetrical degradation is exhibited in an ISE-TCAD simulation of the electric field, which shows the distribution of hot electrons injected into the etch-stop layer below the redundant drain electrode. Published by AIP Publishing.
The suppressed negative bias illumination-induced instability in In-Ga-Zn-O thin film transistors with fringe field structure
(2012-11-26)
Chen, Yu-Chun
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Chang, Ting-Chang
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Li, Hung-Wei
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Hsieh, Tien-Yu
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Chen, Te-Chih
This study investigates the suppressed negative gate bias illumination stress (NBIS) -induced instability of via-type amorphous indium-gallium-zinc-oxide (a-IGZO) thin film transistors (TFTs) with fringe field (FF) structures. The less negative threshold voltage shifts of devices after NBIS are showed when device has larger FF structures. This finding is attributed to more dispersive distribution of photo-generated holes in the width direction of a-IGZO during NBIS, which reduce the hole trapping phenomenon in the front channel interface. The a-IGZO TFT with FF structure is expected to be an effective method to increase the electrical reliability of devices after NBIS. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.4767996]