Browsing by Author "Kwai, DM"
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Item type:Item, Supply and substrate noise tolerance using dynamic tracking clusters in configurable memory designs(2004) ;Chang, MF ;Wen, KA ;Kwai, DM ;電機學院College of Electrical and Computer EngineeringPattern-sensitive soft errors, subject to varied supply and substrate noises, have become increasingly significant for configurable memories embedded in SoCs. In this paper, we study their effects on memory cell, array, and circuit design. It is found that the ground bounce reduces the cell current more severely than the supply voltage drop and substrate bias dip. This encourages the use of metal wires along the wordline or row direction. Bitline tracking by current ratio achieves better accuracy and design for manufacturing (DFM) capability than by capacitance ratio. It requires further enhancement to be resilient to the supply and substrate noises. The proposed dynamic tracking cluster technique provides necessary timing relaxation, while minimizing the speed degradation. Configurable embedded SRAM and ROM in 0.18mum CMOS process are studied.Item type:Item, Via-programmable read-only memory design for full code coverage using a dynamic bit-line shielding technique(2005) ;Chang, MF ;Kwai, DM ;Wen, KA ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsCrosstalk between bit lines leads to read-1 failure in a high-speed via-programmable read only memory (ROM) and limits the coverage of applicable code patterns. Due to the fluctuations in bit-line intrinsic and coupling capacitances, the amount of noise coupled to a selected bit line may vary, resulting in the reduction of sensing margin. In this paper, we propose a dynamic bit-line shielding (DBS) technique, suitable to be implemented in compliable ROM, to eliminate the crosstalk-induced read failure and to achieve full code coverage. Experiments of the 256Kb instances with and without the DBS circuit were undertaken using 0.25 mu m and 0.18 mu m standard CMOS processes. The test results demonstrate the read-1 failures and confirm that the DBS technique can remove them successfully, allowing the ROM to operate under a wide range of supply voltage.