Browsing by Author "Lin, TC"

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A 30 V high voltage NMOS structure design in standard 5 VCMOS processes
(2003-11-01)
Lin, TC
;
Wu, JC
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This paper describes the robust design of the 30 V high voltage NMOS (HVNMOS) structure implemented in a 0.6 mum 5 V standard CMOS processes without any additional masks or process steps. The structure makes use of the field oxide (FOX) and light doping N-well to increase the drain to gate and drain to bulk breakdown voltages, respectively. By varying the six spacing parameters: the channel length, gate overlap FOX, N-well overlap channel length, poly to the active area of the drain (OD2), metal extend beyond the OD2 and N-well extend beyond the OD2 in HVNMOS structure. the breakdown voltage can be improved. The experimental results show that the breakdown voltage of the normal NMOS is 11V, and the breakdown voltage of the HVNMOS is increased to over 30 V. With the optimized layout parameters of the HVNMOS, it can be increased to 38 V.
A two-step A/D converter in digital CMOS processes
(2002)
Lin, TC
;
Wu, JC
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This paper describes a 3V 8-bit 50MSPS two-step analog-to-digital converter implemented in a 0.35mum 1P4M logic CMOS process. A PMOS biased in accumulation mode was used as a coupling capacitor in this ADC, so that the more expensive mixed mode process with double poly or MIM capacitors can be avoided. A modified switch box which greatly reduces the number of switches needed was also presented in this paper. The modified switch box can reduce the capacitance loading effect, of the resistor ladder DAC (R-DAC) and thus making the settling time of the DAC faster. The ADC occupies a die area of 0.38mm(2) (450mum*850mum) and dissipates 64mW at 50MHz clock rate with 3V single supply voltage. The FFT simulation result shows that the SNDR is 48.18dB at 5MHz input frequency and 50MSPS conversion rate and the static simulation shows that the max. INL/DNL is less than 0.5LSB/0.5LSB.
Adaptive hybrid intelligent control for uncertain nonlinear dynamical systems
(2002-10-01)
Wang, CH
;
Lin, TC
;
Lee, TT
;
Liu, HL
;
電控工程研究所
A new hybrid direct/indirect adaptive fuzzy neural network (FNN) controller with state observer and supervisory controller for a class of uncertain nonlinear dynamic systems is developed in this paper. The hybrid adaptive FNN controller, the free parameters of which can be tuned on-line by observer-based output feedback control law and adaptive law, is a combination of direct and indirect adaptive FNN controllers. A weighting factor, which can be adjusted by the tradeoff between,plant knowledge and control knowledge, is adopted to sum together the control efforts from indirect adaptive FNN controller and direct adaptive FNN controller. Furthermore, a supervisory controller is appended into the FNN controller to force the state to be within the constraint set. Therefore, if the FNN controller cannot maintain the stability, the supervisory controller starts working to guarantee stability. On the other hand, if the FNN controller works well, the supervisory controller will be deactivated. The overall adaptive scheme guarantees the global stability of the resulting closed-loop system in the sense that all signals involved are uniformly bounded. Two nonlinear systems, namely, inverted pendulum system and Chua's chaotic circuit, are fully illustrated to track sinusoidal signals. The resulting hybrid direct/indirect FNN control systems show better performances, i.e., tracking error and control effort can be made smaller and it is more flexible during the design process.
An efficient quality-aware memory controller for multimedia platform SoC
(2005-05-01)
Lee, KB
;
Lin, TC
;
Jen, CW
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The ongoing advancements in VLSI technology allow system-on-a-chip (SoC) design to integrate heterogeneous control and computing functions into a single chip. On the other hand, the pressures of area and cost lead to the requirement for a single, shared off-chip DRAM memory subsystem. To satisfy different memory access requirements for latency and bandwidth of these heterogeneous functions to this kind of DRAM memory subsystem, a quality-aware memory controller is important. This paper presents an efficient multilayer, quality-aware memory controller that contains well-partitioned functionality layers to achieve high DRAM utilization while still meet different requirements for bandwidth and latency. Layer 0, also called memory interface socket, is a configurable, programmable, and high-efficient SDRAM controller for designers to rapidly integrate SDRAM subsystem into their designs. Together with Layer 1 quality-aware scheduler, the memory controller also has the capability to provide quality-of-service guarantees including minimum access latencies and fine-grained bandwidth allocation for heterogeneous control and computing functional units in SoC designs. Moreover, Layer 2 built-in address generator designed for multimedia processing units can effectively reduce the address bus traffic and therefore further increase the efficiency of on-chip communication. Experimental results of a digital set-top-box emulation system show that the access latency of the latency-sensitive data flows can be effectively reduced by 37%-65% and the memory bandwidths can be precisely allocated to bandwidth-sensitive data flows with a high degree of control.
An improved interface characterization technique for a full-range profiling of oxide damage in ultra-thin gate oxide CMOS devices
(2003)
Chen, SJ
;
Lin, TC
;
Lo, DK
;
Yang, JJ
;
Chung, SS
In this paper, an improved gate-diode technique has been developed for the interface characterization on both n- and p-MOSFET's with gate oxide in the direct tunneling regime. This method has been demonstrated successfully for measuring oxide damage in all of the channel, space-charge (or junction), and drain extension regions in 20Angstrom ultra-thin gate oxide devices. As an application of the present method, the lateral profile of localized oxide damage due to Negative Bias Temperature Instability (NBTI) or Hot Carrier (HC) effect has been demonstrated. It provides us an understanding of the correlation between the device degradation and various stress-induced oxide damage in CMOS devices.
Constructing an EJB application in a WFMS
(2002)
Wang, JW
;
Lin, TC
;
Hsu, HJ
;
Wang, FJ
;
資訊工程學系
A workflow system provides enterprises the automatic and paperless process management. The idea of Enterprise JavaBeans (EJB) is to utilize components from various vendors to construct an application, which has the characteristics of scalability, security, distributed, and fast development. In the paper, an EJB module and the enterprise beans are implemented. Workflow designer may use this module to invoke the business methods defined in the enterprise bean on the outer application server. The EJB module may facilitate the component development of a workflow system, and reuse the existing components to fulfill the function needed.
Cross-coupled precompensation method for the contouring accuracy of computer numerically controlled machine tools
(1997-07-01)
Chin, JH
;
Lin, TC
;
機械工程學系
;
Department of Mechanical Engineering
A cross-coupled precompensation method (CCPM) for precise trajectories of machine tools is proposed in this study. Compared with the conventional cross-coupled system and uncoupled system by computer simulation and experiment, the pure precompensation method is better in dealing with the circular trajectory and the elimination of the steady-state errors, while the CCPM can achieve the most precise tracking for both linear and circular trajectory at any feedrate. The advantages of CCPM will be enhanced at higher feedrates. At a feedrate of 200 mm/sec the CCPM stands out significantly. (C) 1997 Elsevier Science Ltd.
Cross-coupled precompensation method for the contouring accuracy of computer numerically controlled machine tools
(1997-07-01)
Chin, JH
;
Lin, TC
;
交大名義發表
;
機械工程學系
;
National Chiao Tung University
A cross-coupled precompensation method (CCPM) for precise trajectories of machine tools is proposed in this study. Compared with the conventional cross-coupled system and uncoupled system by computer simulation and experiment, the pure precompensation method is better in dealing with the circular trajectory and the elimination of the steady-state errors, while the CCPM can achieve the most precise tracking for both linear and circular trajectory at any feedrate. The advantages of CCPM will be enhanced at higher feedrates. At a feedrate of 200 mm/sec the CCPM stands out significantly. (C) 1997 Elsevier Science Ltd.
Design of sampled-data systems with large plant uncertainty using quantitative feedback theory
(2001-03-01)
Lin, TC
;
Wang, CH
;
Teng, CC
;
Lee, TT
;
電控工程研究所
This paper proposes a new quantitative feedback theory (QFT) design framework for dealing,with sampled-data systems with large plant uncertainty. After the QFT-based design in the continuous-time domain is completed, the analogue controller can he transformed directly into a rational discrete-time transfer function via approximate Z transform with the sampling time as a free parameter. The sampling time can therefore be adjusted to make the uncertain sampled-data system robustly stable. In comparison with other approaches, our approach is much more systematic without the solvability problem and yet significant enough to guide the designer to realize the physical controller in which the plant transfer function has prescribed bounds on its parameters. Several examples are used to illustrate the proposed approach and excellent results are obtained.
Efficient generation of continuous-wave yellow light by single-pass sum-frequency mixing of a diode-pumped Nd : YVO4 dual-wavelength laser with periodically poled lithium niobate
(2002-10-15)
Chen, YF
;
Tsai, SW
;
Wang, SC
;
Huang, YC
;
Lin, TC
We report efficient generation of cw yellow light by use of single-pass sum-frequency mixing from a diode-pumped Nd:YVO4 dual-wavelength laser with periodically poled lithium niobate. A diode-pumped Nd:YVO4 dual-wavelength laser is implemented with a three-mirror cavity, and the optimum oscillation condition is obtained from theoretical analysis. We extracted 78 mW of power at 593 run from 1.2 W at 1064 nm and from 1.0 W at 1342 nm in a beam with excellent quality. The output power could probably be increased to similar to92 mW by antireflection. coating of the crystal. (C) 2002 Optical Society of America.
Implementing compensation capacitor in logic CMOS processes
(2002-08-01)
Lin, TC
;
Wu, JC
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
MOSFETs can be used as capacitors, but its capacitance can vary by 5 to 7 times as its terminal voltage varies. To reduce the voltage dependence of the capacitance, this paper proposed two types of devices: one is called accumulation MOSFET (AMOS) and the other is formed by two conventional PMOS connected in anti-parallel. These two devices are readily available in the standard digital CMOS processes. The proposed capacitors were implemented in three different CMOS processes. The measured results show that the capacitances of both devices have less voltage dependence than a single PMOS. The voltage dependence of the AMOS capacitance can be as small as 17%. The minimum capacitance per unit area of the AMOS is 1.8 times that of the double-poly capacitor in an analog/mixed-mode CMOS process. To verify the usefulness of these two types of capacitors, they are used as compensation capacitors in a conventional two-stage amplifier. The measured results show that the amplifier compensated by the AMOS capacitor has little variation (6%) of the unity-gain frequency over the input common-mode range. Due to its smaller die area and cheaper digital process, AMOS can be used as compensation capacitor without resorting to more expensive analog process.
Localization of NBTI-induced oxide damage in direct tunneling regime gate oxide pMOSFET using a novel low gate-leakage gated-diode (L-2-GD) method
(2002)
Chung, SS
;
Lo, DK
;
Yang, JJ
;
Lin, TC
;
電子工程學系及電子研究所
As gate oxide thickness reduces, previous reported methods can not work well for very thin gate oxide devices as a result of the measured leakage current through the gate oxide. For the first time, a novel Low gate Leakage Gate-Diode (L-2-GD) method has been developed for the interface characterization of MOSFET devices with gate oxide in the direct tunneling regime. Three-peak experimental results, as seen from DCIV measurement, can be easily obtained from this L-2-GD method. This method has been demonstrated successfully for the ultra-thin (12-20Angstrom) gate oxide device. Also, by using this new technique, the localized oxide damage due to NBTI or HC (Hot Carrier) stress effect can be identified simply from the measured drain currents. Therefore, this L-2-GD technique is well suited for the characterization of very thin gate oxide reliabilities, and in particular for the nano-scale CMOS devices.
Miscibility in blends of liquid crystalline copolyester and semicrystalline poly(ethylene-2,6-naphthalene dicarboxylate)
(2000-12-01)
Ho, JC
;
Lin, TC
;
Wei, KH
;
材料科學與工程學系
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Department of Materials Science and Engineering
The miscibility in blends of random liquid crystalline copoly(oxybenzoate-ethylene terephthalate) at a molar ratio of 60:40 (P64) and semicrystalline poly(ethylene-2,6-naphthalene dicarboxylate) (PEN) were investigated with differential scanning calorimetry, wide angle X-ray diffraction and polarized optical micrography. It was found that P64 and PEN were partially miscible as evidenced from the appearance of a single glass transition temperature for each blend at different compositions. Furthermore, the Flory-Huggins interaction parameter, chi(12), for P64 and PEN was determined to be -1.13 through the melting point depression analysis, indicating miscibility in blends of P64; and PEN at the melt state. The coherence lengths of PEN in the presence of a small amount of P64, around 3%, were larger than that in pure PEN, implying the regularity of PEN crystals in the blends with low P64 content being more perfect than that of the pure PEN. (C) 2000 Elsevier Science Ltd. All rights reserved.
Observer-based indirect adaptive fuzzy-neural tracking control for nonlinear SISO systems using VSS and H-infinity approaches
(2004-04-16)
Lin, TC
;
Wang, CH
;
Liu, HL
;
電控工程研究所
;
Institute of Electrical and Control Engineering
Fuzzy control is a model free approach, i.e., it does not require a mathematical model of the system under control. An observer-based indirect adaptive fuzzy neural tracking control equipped with VSS and H control algorithms is developed for nonlinear SISO systems involving plant uncertainties and external disturbances. Three important control methods, i.e., adaptive fuzzy neural control scheme, VSS control design and H tracking theory, are combined to solve the robust nonlinear output tracking problem. A modified algebraic Riccati-like equation must be solved to compensate the effect of the approximation error via adaptive fuzzy neural system on the H control. The overall adaptive scheme guarantees the stability of the resulting closed-loop system in the sense that all the states and signals are uniformly bounded and arbitrary small attenuation level of the external disturbance on the tracking error can be achieved. The simulation results confirm the validity and performance of the advocated design methodology. (C) 2003 Elsevier B.V. All rights reserved.
Quality-aware memory controller for multimedia platform SOC
(2003)
Lin, TC
;
Lee, KB
;
Jen, CW
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The ongoing advancements in VLSI technology allow SoC design to integrate heterogeneous control and computing functions into a single chip. On the other hand, the pressures of area and cost lead to the requirement for a single, shared off-chip DRAM memory subsystem. To satisfy different memory access requirements for latency and bandwidth of these heterogeneous functions to this kind of DRAM memory subsystem, a quality-aware memory controller is important. This paper presents an efficient memory controller that contains a quality-aware scheduler and a configurable DRAM memory interface socket to achieve high DRAM utilization while still meet different requirements for bandwidth and latency. Simulation results show that the latency of the latency-sensitive data flow can be reduced to 50%, and the memory bandwidths can be precisely allocated to bandwidth-sensitive data flows with a high degree of control.
Role of extrinsic atoms on the morphology and field emission properties of carbon nanotubes
(2003-06-16)
Chan, LH
;
Hong, KH
;
Xiao, DQ
;
Hsieh, WJ
;
Lai, SH
Extrinsic atoms were doped into multiwalled carbon nanotubes (MWCNTs) using microwave plasma-enhanced chemical vapor deposition. Doped nitrogen atoms alter the original parallel graphenes into highly curved ones including some fullerene-like structures. Doped nitrogen atoms could replace carbon atoms in MWCNTs and therefore increase the electronic density that enhances the electron field emission properties. On the other hand, the incorporation of boron into the carbon network apparently increases the concentration of electron holes that become electron traps and eventually impedes the electron field emission properties. Fowler-Nordheim plots show two different slopes in the curve, indicating that the mechanism of field emission is changed from low to high bias voltages. beta values could be increased by an amount of 42% under low bias voltages and 60% under high bias voltages in the N-doped MWCNTs, but decreased by an amount of 8% under low bias region and 68% under high bias voltage in the B-doped MWCNTs. (C) 2003 American Institute of Physics.