Browsing by Author "Luo, Wun-Cheng"

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Characterization of Highly Strained nFET Device Performance and Channel Mobility with SMT
(2010)
Lu, Chih-Cheng
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Huang, Jiun-Jia
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Luo, Wun-Cheng
;
Hou, Tuo-Hung
;
Lei, Tan-Fu
This paper compares and analyzes the strained negative channel field effect transistor (nFET) device performance and the channel mobility behavior obtained by the stress memorization technique (SMT) using two different types of nitride films. These nitride film properties and wafer bowing during SMT fabrication are investigated. The electrical properties of SMT strained nFET devices including current-voltage characteristics, transconductance, carrier mobility, and interface state (D(it)) are also analyzed. Although SMT nitride strain can enhance electron mobility, it is critical to control the nitride properties and its hydrogen content to minimize electron mobility degradation due to interface-state generation. Thus, a simple view of the essential physics of mobility enhancement in SMT strained nFETs has been provided. Results in this work also provide guidance to further nFET performance enhancement in the ever-more challenging device targets of future technology generations. (C) 2010 The Electrochemical Society. [DOI: 10.1149/1.3416923] All rights reserved.
Investigating MLC Variation of Filamentary and Non-filamentary RRAM
(2014-01-01)
Liu, Jen-Chieh
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Wang, I-Ting
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Hsu, Chung-Wei
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Luo, Wun-Cheng
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Hou, Tuo-Hung
n One Selector-One Resistor (1S1R) Crossbar Array for High-density Flexible Memory Applications
(2011)
Huang, Jiun-Jia
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Tseng, Yi-Ming
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Luo, Wun-Cheng
;
Hsu, Chung-Wei
;
Hou, Tuo-Hung
Lack of a suitable selection device to suppress sneak current has impeded the development of 4F(2) crossbar memory array utilizing stable and scalable bipolar resistive-switching. We report a high-performance nonlinear bipolar selector realized by a simple Ni/TiO2/Ni MIM structure with a high current density of 10(5) A/cm(2), and a Ni/TiO2/Ni/HfO2/Pt vertically stacked 1S1R cell capable of gigabit memory implementation. Furthermore, the demonstration of 1S1R array fabricated completely at room temperature on a plastic substrate highlights the promise of future extremely low-cost flexible nonvolatile memory.
One Selector-One Resistor (1S1R) Crossbar Array for High-density Flexible Memory Applications
(2011)
Huang, Jiun-Jia
;
Tseng, Yi-Ming
;
Luo, Wun-Cheng
;
Hsu, Chung-Wei
;
Hou, Tuo-Hung
Lack of a suitable selection device to suppress sneak current has impeded the development of 4F(2) crossbar memory array utilizing stable and scalable bipolar resistive-switching. We report a high-performance nonlinear bipolar selector realized by a simple Ni/TiO2/Ni MIM structure with a high current density of 10(5) A/cm(2), and a Ni/TiO2/Ni/HfO2/Pt vertically stacked 1S1R cell capable of gigabit memory implementation. Furthermore, the demonstration of 1S1R array fabricated completely at room temperature on a plastic substrate highlights the promise of future extremely low-cost flexible nonvolatile memory.
Rapid Prediction of RRAM RESET-State Disturb by Ramped Voltage Stress
(2012-04-01)
Luo, Wun-Cheng
;
Lin, Kuan-Liang
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Huang, Jiun-Jia
;
Lee, Chung-Lun
;
Hou, Tuo-Hung
This letter proposes a novel technique for predicting with high confidence the disturbance of the resistive-switching random access memory (RRAM) RESET state based on ramped voltage stress. The technique yields statistical distributions and voltage acceleration parameters equivalent to those of a conventional constant voltage method. Several ramp rates and acceleration models were validated for the accuracy regarding conversion between the two methods. The proposed method not only reduces the time and cost of reliability analysis but also provides a quantitative link between disturbance properties and the widely available RRAM data measured by a linear voltage ramp. Additionally, the non-Poisson area scaling supports the localized filament model.
Reversible transition of resistive switching induced by oxygen-vacancy and metal filaments in HfO2
(2013-11-01)
Luo, Wun-Cheng
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Hou, Tuo-Hung
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Lin, Kuan-Liang
;
Lee, Yao-Jen
;
Lei, Tan-Fu
In contrast to the irreversible transition of resistive switching induced by oxygen-vacancy filaments (VF) and metal filaments (MF) reported in the literature, this study reports coexistence and completely reversible transition of VF- and MF-induced resistive switching in a Ni/HfO2/SiOx/P+-Si device with three distinct and stable resistance states. In a dual filament model proposed, VF and MF may coexist at the same percolation path, and the formation and rupture proceed in a two-step fashion by choosing appropriate SET/RESET conditions. Exploiting the dependence of different filament compositions on resistive switching may enable new design space for future multi-level-cell resistive-switching memory. (C) 2013 Elsevier Ltd. All rights reserved.
RRAM SET Speed-Disturb Dilemma and Rapid Statistical Prediction Methodology
(2012)
Luo, Wun-Cheng
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Liu, Jen-Chieh
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Feng, Hsien-Tsung
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Lin, Yen-Chuan
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Huang, Jiun-Jia
This paper presents a first comprehensive study of SET speed-disturb dilemma in RRAM using statistically-based prediction methodologies. A rapid ramped-voltage stress based on percolation model and power-law V-t dependence showed excellent agreement with the time-consuming constant-voltage stress, and was applied to evaluate current status of RRAM devices in the literature.
Statistical Model and Rapid Prediction of RRAM SET Speed-Disturb Dilemma
(2013-11-01)
Luo, Wun-Cheng
;
Liu, Jen-Chieh
;
Lin, Yen-Chuan
;
Lo, Chun-Li
;
Huang, Jiun-Jia
A comprehensive study of SET speed-disturb dilemma in resistive-switching random access memory (RRAM) is presented using statistically based prediction methodologies, accounting for the stochastic nature of SET. An analytical percolation model has been successful in explaining the statistical Weibull distribution of SET time and SET voltage in addition to the power-law voltage-time dependence. Two prediction methodologies using constant voltage stress (CVS) and ramp voltage stress (RVS) are proposed to evaluate the SET speed-disturb properties. The RVS method reduces analysis time and cost and yields equivalent results as the CVS method. Furthermore, the RVS method is used to evaluate the device design space and the current status of RRAM technology to meet the strict requirement of the SET speed-disturb dilemma.
Strained Silicon Technology: Mobility Enhancement and Improved Short Channel Effect Performance by Stress Memorization Technique on nFET Devices
(2010)
Lu, Chih-Cheng
;
Huang, Jiun-Jia
;
Luo, Wun-Cheng
;
Hou, Tuo-Hung
;
Lei, Tan-Fu
This paper presents a fundamental study of a stress memorization technique (SMT), which utilizes a capping nitride dielectric film to enhance negative channel field-effect transistor (nFET) device performance. SMT strain engineering is highly compatible with current standard complementary metal oxide semiconductor processes without introducing substantial additional complexity. In this work, we report that SMT-strained nFET exhibits a higher transconductance G(m_lin), which indicates strain-induced electron mobility enhancement. The nFET short channel effect is also improved by the SMT process. Improved V(t) roll-off characteristics manifest itself and are shown to result from retarded junction diffusion as indicated by secondary-ion mass microscopy analysis. Finally, this work demonstrates that when combined with a strained contact etch stop layer (CESL) technique, SMT provides additional strain beyond that provided by the CESL, which results in further improved nFET performance.