Browsing by Author "Shiu, Yu-Da"

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CMOS power amplifier with ESD protection design merged in matching network
(2007)
Shiu, Yu-Da
;
Huang, Bo-Shih
;
Ker, Ming-Dou
;
交大名義發表
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National Chiao Tung University
A power amplifier (PA) with combination of ESD protection circuit and matching network into single block was proposed and implemented in a 0.18-mu m CMOS process. By comprising ESD protection function into the matching network, this design omits individual I/O ESD clamps to alleviate loading that degrades RF performances. According to the experimental results, the ESD protection circuit with LC configuration contributes a 3.0-kV human body model (HBM) ESD robustness without significant degradation on RF performances of the PA for 2.4-GHz RF applications.
Investigation on RF characteristics of stacked P-I-N polysilicon diodes for ESD protection design in 0.18-mu m CMOS technology
(2006)
Shiu, Yu-Da
;
Chuang, Che-Hao
;
Ker, Ming-Dou
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
An ESD protection design by using the stacked P-I-N polysilicon diodes for CMOS RF integrated circuits is proposed to reduce the input capacitance and to avoid the noise coupling from the common substrate. In this paper, the dc I-V characteristics, RF S-parameters, and ESD robustness of the stacked P-I-N polysilicon diodes are investigated in a 0.18-mu m salicided CMOS process. This polysilicon diode with small parasitic capacitance and high ESD robustness is filly process compatible to general CMOS process without extra process modification.