Browsing by Author "Singh, Sankalp Kumar"

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A simple extraction method for parasitic series resistances in GaN HEMTs considering non-quasi-static effects
(2019-05-01)
Nagarajan, Venkatesan
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Chen, Kun-Ming
;
Wang, Huan-Chung
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Singh, Sankalp Kumar
;
Anandan, Deepak
A simple technique for extracting the bias-dependent parasitic series resistances of the GaN-based high electron mobility transistor (HEMT) is demonstrated in this paper. With considering the non-quasi-static effect in devices, new analytical Z-parameter formulations are derived to determine parasitic resistances using the curve-fitting algorithm. More accuracy parasitic resistances can be obtained over a wide fitting frequency range compared to the conventional method which ignores the non-quasi-static effect. Here the intrinsic parameters are then calculated directly from intrinsic Y-parameters after de-embedding the parasitic elements in the small-signal equivalent circuit. An excellent agreement between the measured and simulated S-parameters from 100 MHz to 40 GHz is achieved, which validates the feasibility of our method for extracting the bias-dependent parasitic resistances.
Crystal phase control in self-catalyzed InSb nanowires using basic growth parameter V/III ratio
(2019-09-15)
Anandan, Deepak
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Nagarajan, Venkatesan
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Kakkerla, Ramesh Kumar
;
Yu, Hung Wei
;
Ko, Hua Lun
In this work, the influence of V/III ratio on self-catalyzed InSb nanowire (NW) crystal structure is investigated using metal organic chemical vapor deposition. The effective balance of V/III ratio determines the change of InSb NW crystal structure from zincblende to wurtzite. Particularly, as group-V molar flow varies from 6.4 x 10(-5) to 8.0 x 10(-5) mol/min, wurtzite segment length of InSb NW increases from 16 +/- 9 nm to 89 +/- 9 nm, whereas zincblende crystal phase is observed for other molar flows. We interpret the observed phase transition to a lower surface energy of In-Sb alloy droplet than pure In-droplet, which makes triple phase line nucleation energetically favorable. This study gives insight on single growth parameter (V/III ratio) change to the InSb NW crystal control, such a technique is essential to selectively tune the crystal phase of single NW for various applications.
Crystal structure control of Au-free InAs and InAs/GaSb heterostucture nanowires grown on Si (111) by metal-organic chemical vapor deposition
(2019-01-01)
Kakkerla, Ramesh Kumar
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Anandan, Deepak
;
Singh, Sankalp Kumar
;
Yu, Hung Wei
;
Lee, Ching-Ting
In this letter, the growth of gold-free GaSb on various InAs nanowire (NW) crystal structures using metal-organic chemical vapor deposition is demonstrated. The GaSb was grown radially and axially on wurtzite (WZ), zinc-blend (ZB) and polytype (mixture of WZ and ZB) InAs NWs. The effect of the various InAs crystal structures on GaSb was studied. This study demonstrates the control of the crystal growth of InAs and InAs/GaSb heterostructure NWs through the optimization of growth parameters and crystal transfer from core to shell, such techniques are necessary for the growth of NWs for future nanoelectronic device applications, such as TFET. (C) 2018 The Japan Society of Applied Physics
Growth and Crystal Structure Investigation of InAs/GaSb Heterostructure Nanowires on Si Substrate
(2018-11-01)
Kakkerla, Ramesh Kumar
;
Hsiao, Chih-Jen
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Anandan, Deepak
;
Singh, Sankalp Kumar
;
Chang, Sheng-Po
We report gold-free growth of vertically aligned InAs/GaSb heterostructure nanowires (NWs) on Si(111) substrate by metal organic chemical vapor deposition technique. The effect of growth temperature on morphology and growth rate for InAs and InAs/GaSb heterostructure NWs were investigated. A combination of high material flow rates and optimum temperature (600 degrees C) has given better crystal quality of InAs nanowires. The morphology and shell thickness of NWs as observed by scanning electron microscope and transmission electron microscope (TEM) measurements can be tuned by the growth temperature. Electron microscopy also shows the formation of GaSb both in radial and axial directions outside the InAs NW core at certain growth temperatures. Crystal structure of InAs and InAs/GaSb heterostructure NWs was analyzed by high-resolution TEM and fast Fourier transform analysis. Using good crystalline InAs core grown at optimized growth temperature (600 degrees C), GaSb shell has been grown without any misfit dislocations at the core-shell interface. Basic electrical properties have been measured by forming ohmic contacts. I-V characteristics exhibit linear response indicating good ohmic behavior. These results show good control over InAs NWs growth, the GaSb shell thickness, and its crystal quality, which are essential for future nanoelectronic devices such as tunneling FET.
Growth and Crystal Structure Investigation of Self-catalyst InAs/GaSb Heterostructure Nanowires on Si substrate
(2017-01-01)
Kakkerla, Ramesh Kumar
;
Hsiao, Chih-Jen
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Anandan, Deepak
;
Singh, Sankalp Kumar
;
Chang, Edward Yi
We demonstrate the self-catalyst (SC) growth of vertically aligned InAs and InAs/GaSb heterostructure nanowires on Si(111) substrate by Metal Organic Chemical Vapor Deposition (MOCVD). The effect of growth temperature on morphology and growth rate for SC InAs and InAs/GaSb heterostructure nanowires (NWs) were investigated. Scanning Electron Microscope (SEM) and Transmission Electron Microscope (TEM) measurements revealed the morphology and shell thickness can be tuned by the growth temperature. Electron microscopy also shows the formation of GaSb both in radial and axial directions outside the SC InAs NW core at certain growth temperatures. Crystal structure of InAs/GaSb heterostructure nanowires was also discussed. These results show that the control over SC InAs NWs growth, the GaSb shell thickness and it's crystal quality was achieved which is essential for future nano electronic devices such as TFET.
Growth of foreign-catalyst-free vertical InAs/InSb heterostructure nanowires on Si (111) substrate by MOCVD
(2019-01-15)
Anandan, Deepak
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Kakkerla, Ramesh Kumar
;
Yu, Hung Wei
;
Ko, Hua Lun
;
Nagarajan, Venkatesan
In this study, growth of Au-free InAs/InSb vertical heterostructure (HS) nanowires (NWs) on highly lattice mismatched Si (1 1 1) substrate by metal organic chemical vapor deposition (MOCVD) is demonstrated. Careful selections of InSb growth parameters lead to In-rich growth regime such that direct impingement of growth precursors on top of grown InAs NW (self-assembled) stems result in axial InSb HSs nucleation on InAs stems. The observed indium (In) droplet on InSb HS NW tip shows that InSb HS growth followed a self-catalyzed growth mechanism. InSb HS axial growth rate and morphology are controlled by growth temperature and growth time. A small change in the growth parameters significantly affects In particle accumulation, particle size and its chemical composition, and thus affects the InSb nucleation on the stem. Especially, it is found that (i) growth time of less 10 min yields vertical InSb HS NW on the top of the InAs stem, (ii) as the growth time increases above 10 min, the growth turned to be InSb wrapped InAs/InSb core-shell HS due to coaxial lateral growth. High resolution transmission electron microscopy (HRTEM) study reveals that all the InSb HSs exhibit pure zinc-blende (ZB) crystal structure. The results presented here provide significant guidelines for external catalyst-free InAs/InSb HS NW growth using MOCVD on silicon (Si) substrate for various optoelectronics and electronics applications.
Hetero structure PNPN tunnel FET: Analysis of scaling effects on counter doping
(2018-08-15)
Joseph, H. Bijo
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Singh, Sankalp Kumar
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Hariharan, R. M.
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Priya, P. Aruna
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Kumar, N. Mohan
This paper investigates the effect of counter doping in an n-Tunneling Field Effect Transistor(nTFET). Effect of various pocket lengths between the source and the channel was investigated. A double gate structure with a 2 nm counter doped pocket provides higher rate of band-to-band tunneling and better on current, thereby increasing the device performance. Steep Subthreshold Swing (SS) of around 23 mV/dec was obtained due to larger band bending at a low operating voltage of 0.5 V. The low leakage current greatly reduces power consumption. The degree of depletion in pocket with smaller dimensions enhances device performance by achieving good electrical characteristics in both above and below threshold regimes. Increase in pocket length degrades the device performance thus affecting the subthreshold swing. (C) 2018 Elsevier B.V. All rights reserved.
Low-Frequency Noise Characterization of AlGaN & x002F;GaN HEMTs and MIS-HEMTs Under UV Illumination
(2020-01-01)
Nagarajan, Venkatesan
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Chen, Kun-Ming
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Lin, Hsin-Yi
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Hu, Hsin-Hui
;
Huang, Guo-Wei
The low-frequency noise characteristics of AlGaN & x002F;GaN HEMTs and MIS-HEMTs are investigated in the dark condition and under UV illumination. The test devices with a 3-& x03BC;m-thick GaN buffer and a 25-nm-thick Al_0.22Ga_0.78N barrier layer were fabricated on the silicon wafer. For MIS-HEMTs, a 25-nm-thick SiN layer was deposited as a gate dielectric. The measured low-frequency noises show a 1 & x002F;f spectrum and can be described by the carrier number fluctuation model. Different noise responses to the UV light between HEMTs and MIS-HEMTs were observed. By comparing the noise data in dark and under UV illumination, the noise sources under the gate and in the ungated gate-drain access region have been identified. From these results, we can find a design guideline to improve the noise and reliability of GaN-based devices for optoelectronic applications.
Optimization of InAs/GaSb core-shell nanowire structure for improved TFET performance
(2019-10-01)
Singh, Sankalp Kumar
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Kakkerla, Ramesh Kumar
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Joseph, H. Bijo
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Gupta, Ankur
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Anandan, Deepak
The performance of InAs/GaSb core-shell nanowire TFET is systematically investigated for the effects of intrinsic device parameters such as channel doping, shell thickness, spacer length and source offset. Device ON-current (I-ON) was chosen as the key figure of merit. It is found that I-ON improves due to improved electrostatic control achieved by the TFET with optimum shell diameter. The maximum I-ON obtained for a shell thickness of 2 nm was 33.65 mu A/mu m and a Subthreshold Swing (SS) of 12.9 mV/decade with an I-ON/I-OFF ratio of 1.49 x 10(8) for our device. Device I-ON can be further improved by adding an optimum spacer at the source-channel junction. It was also found that device ON-current is almost constant and does not get much affected by having a larger shell offset.
Simulation study of gated nanowire InAs/Si Hetero p channel TFET and effects of interface trap
(2019-11-15)
Joseph, H. Bijo
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Singh, Sankalp Kumar
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Hariharan, R. M.
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Tarauni, Yusuf
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Thiruvadigal, D. John
The impact of EOT (Equivalent Oxide Thickness) scaling, diameter scaling, and interface traps on the performance of gated InAs/Si Hetero pTFET (Tunneling field effect transistor) is investigated. EOT scaling improves SS (SubthresholdSwing) below the thermal limit and on current moderately. Diameter scaling decreases on current and marginally improves SS. The simulation study validates that the transfer characteristics of pTFET in sub-threshold region are completely dominated by thermionic emission of holes and TAT (Trap Assisted Tunneling). This in turn blocks SS to attain < 60 mV/dec. Furthermore, Si/Oxide interface traps minimize the electrostatic gate coupling with channel region additionally deteriorates SS. Interface trap density with different values denotes that sub 2.3k(B)T/q SS can only be realized for interface trap densities D-it < 1 x 10(11) cm(-2)eV(-1) at both InAs/Si and Si/Oxide. Hence this reaffirms the experimental data, that the prerequisite of D-it < 1 x 10(12) cm(-2)eV(-1) for InAs/Si nanowire p-TFET.
Study of Charge Trapping Effects on AlGaN/GaN HEMTs Under UV Illumination With Pulsed I-V Measurement
(2020-06-01)
Nagarajan, Venkatesan
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Chen, Kun-Ming
;
Chen, Bo-Yuan
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Huang, Guo-Wei
;
Chuang, Chia-Wei
The charge trapping effects on AlGaN/GaN HEMTs under UV illumination are investigated using the pulsed current-voltage (I-V) measurement method. The test samples are unpassivated Schottky-gate HEMTs and metal-insulator-semiconductor HEMTs (MIS-HEMTs) with SiN gate dielectric. For HEMTs, the dominant charge trapping sources are the surface trap states, whereas, for MIS-HEMTs, they are trap states in the SiN gate dielectric and GaN buffer. When these devices are shined with the UV light, the drain current increases apparently in both samples owing to the generated photocurrent. By combining the UV illumination and pulsed I-V measurement, we find out the UV light has less effect on the surface charge trapping in the unpassivated HEMTs. Moreover, in MIS-HEMTs, we observe the charge trapping in the SiN gate dielectric becomes more serious under UV illumination, whereas the charge trapping in the GaN buffer is suppressed significantly. These findings are important for designing a GaN-based HEMT for photonic applications. In addition, the different responses of the surface-, buffer-, and gate-dielectric-related charge trapping to the UV light suggest that it would be easier to distinguish the trap types by introducing the UV illumination during the pulse measurement.
Temperature effect on the growth of Au-free InAs and InAs/GaSb heterostructure nanowires on Si substrate by MOCVD
(2018-05-15)
Kakkerla, Ramesh Kumar
;
Anandan, Deepak
;
Hsiao, Chih-Jen
;
Yu, Hung Wei
;
Singh, Sankalp Kumar
We demonstrate the growth of vertically aligned Au-free InAs and InAs/GaSb heterostructure nanowires on Si (1 1 1) substrate by Metal Organic Chemical Vapor Deposition (MOCVD). The effect of growth temperature on the morphology and growth rate of the InAs and InAs/GaSb heterostructure nanowires (NWs) is investigated. Control over diameter and length of the InAs NWs and the GaSb shell thickness was achieved by using growth temperature. As the GaSb growth temperature increase, GaSb radial growth rate increases due to the increase in alkyl decomposition at the substrate surface. Diffusivity of the adatoms increases as the GaSb growth temperature increase which results in tapered GaSb shell growth. Scanning Electron Microscope (SEM) and Transmission Electron Microscope (TEM) measurements revealed that the morphology and shell thickness can be tuned by the growth temperature. Electron microscopy also shows the formation of GaSb both in radial and axial directions outside the InAs NW core can be controlled by the growth temperature. This study demonstrates the control over InAs NWs growth and the GaSb shell thickness can be achieved through proper growth temperature control, such technique is essential for the growth of nanowire for future nano electronic devices, such as Tunnel FET. (C) 2018 Elsevier B.V. All rights reserved.