Optimization of InAs/GaSb core-shell nanowire structure for improved TFET performance

Abstract

The performance of InAs/GaSb core-shell nanowire TFET is systematically investigated for the effects of intrinsic device parameters such as channel doping, shell thickness, spacer length and source offset. Device ON-current (I-ON) was chosen as the key figure of merit. It is found that I-ON improves due to improved electrostatic control achieved by the TFET with optimum shell diameter. The maximum I-ON obtained for a shell thickness of 2 nm was 33.65 mu A/mu m and a Subthreshold Swing (SS) of 12.9 mV/decade with an I-ON/I-OFF ratio of 1.49 x 10(8) for our device. Device I-ON can be further improved by adding an optimum spacer at the source-channel junction. It was also found that device ON-current is almost constant and does not get much affected by having a larger shell offset.