Browsing by Author "TSENG, CC"

Now showing 1 - 9 of 9

A DATA DRIVEN HYBRID COMPUTER ARCHITECTURE
(1992-09-01)
TSENG, CC
;
LIN, CZ
;
HWANG, JK
;
LIN, KT
;
資訊工程學系
The combination of dataflow and von Neumann execution models is a recent trend in designing high speed computers. In this paper, a data-driven hybrid computer architecture is presented. Dynamic data-driven execution principle, instead of program counter, is used to control the execution of instructions in a von Neumann style pipelined architecture. Unlike normal dynamic dataflow architecture, data are explicitly stored in memory and their memory locations are used as tags. Matching operation is accomplished by a simple comparison of two counters and no special matching unit is required. With an ideal memory system, no bubble may occur in the pipe if sufficient parallelism exists in the program. Furthermore, multiple memory modules and short-circuit scheme are used to fulfill simultaneous memory requests. An extensive simulator has been designed to evaluate the proposed architecture. The experimental results show that the proposed architecture is promising.
A NUMERICAL STUDY OF A STRUCTURE PROTECTED BY WATER FILM FROM AN INCIDENT HEAT-FLUX
(1990-05-01)
FU, WS
;
LIN, JD
;
TU, KC
;
TSENG, CC
;
交大名義發表
ANALYZING CACHE PERFORMANCE ON MULTI-STREAM EXECUTION PROCESSOR
(1993)
LIN, CZ
;
TSENG, CC
;
CHUNG, CP
;
資訊工程學系
;
Department of Computer Science
CLUSTERING APPROACH TO GROUPING OBJECTS IN MESSAGE-PASSING SYSTEMS
(1995-10-01)
CHANG, WT
;
TSENG, CC
;
資訊工程學系
;
Department of Computer Science
Grouping related objects into processing nodes is one of the cost-effective solutions in distributed OOP. The authors propose a hierarchical clustering grouping strategy to minimize the cost of invocations on a given class hierarchy in a distributed manner.
DESIGN OF AN EFFICIENT DATA-DRIVEN PIPELINED COMPUTER ARCHITECTURE
(1995-07-01)
LIN, CZ
;
TSENG, CC
;
CHI, KH
;
交大名義發表
;
資訊工程學系
The combination of dataflow and von Neumann execution models is a recent trend in the design of high performance computers. In this paper, a data-driven hybrid computer architecture is presented. Instead of a program counter, the principle of dynamic data-driven execution is used to control the execution of instructions in a von Neumann-style pipeline architecture. One of the operands of each dyadic instruction is explictly stored in memory, and the memory locations of the stored operands are used as tags. Matching is accomplished by simply checking a present flag and no special matching unit is required. No bubbles will occur in the pipe if sufficient parallelism exists in the program. Experimental results show that the proposed architecture outperforms two previously proposed architectures.
ENHANCEMENT OF HEAT-TRANSFER FOR A TUBE WITH AN INNER TUBE INSERTION
(1994-02-01)
FU, WS
;
TSENG, CC
;
交大名義發表
;
機械工程學系
;
National Chiao Tung University
A numerical study of flow field and heat transfer in a heated circular tube with an inner tube inserted has been investigated. Due to the insertion of the inner tube, part of the fluid is deviated from the original path to the heated tube which results in the increase of heat transfer rate from the heated wall. The Projection method is adopted to predict the flow field and three different types of inner tube, (1) straight tube, (2) contraction-enlargement tube and (3) enlargement-contraction tube, are considered. The calculations are performed for Reynolds numbers of 100, 500, 1000, and Prandtl numbers of 0.1, 0.7, 7 and 10. The results show that, except at very low Peclet number, the heat transfer rate of the heated tube increases when an inner tube is inserted. About 50% increase in heat transfer rate can be achieved under the condition of constant pumping power evaluation and twice the heat transfer rate than for the empty tube can be achieved under the condition of constant flow rate evaluation.
EXPERIMENTAL-STUDY OF THE HEAT-TRANSFER ENHANCEMENT OF AN OUTER TUBE WITH AN INNER-TUBE INSERTION
(1995-12-01)
FU, WS
;
TSENG, CC
;
HUANG, CS
;
交大名義發表
;
機械工程學系
This experimental study aims to investigate the heat transfer phenomena of an outer tube with an inner-tube insertion. The naphthalene sublimation method is adopted which measures the sublimation depth of naphthalene necessary to reduce the local heat transfer through the analogue relation between heat and mass transfer. The working fluid is air and the data runs are performed for Reynolds numbers of 1058, 1360 and 1965. The comparison between experimental and numerical results shows good agreement. It is also found that, with an inner-tube insertion, the heat transfer rate of the outer tube increases as the Reynolds number of the tube flow and the size of inner tube increase, as long as the inner tube is not Larger than a given size.
NATURAL-CONVECTION IN AN ENCLOSURE WITH NONUNIFORM WALL TEMPERATURE
(1994-11-01)
FU, WS
;
TSENG, CC
;
CHEN, YC
;
交大名義發表
;
機械工程學系
A numerical study of natural convection in an enclosure was investigated. The heated wall of the enclosure is divided into two of the higher and lower temperature regions and the temperature of the cold wall is maintained at a constant. The parameters of Rayleigh number and length ratio are mainly considered. The results show that the local Nusselt number distribution varies drastically at the intersection of the higher and lower temperature regions, and the flow is strongly affected by the above two parameters.
RESIDUE SYSTOLIC IMPLEMENTATIONS FOR NEURAL NETWORKS
(1995)
ZHANG, CN
;
WANG, M
;
TSENG, CC
;
資訊工程學系
;
Department of Computer Science
In this work we propose two techniques for improving VLSI implementations for artificial neural networks (ANNs). By making use of two kinds of processing elements (PEs), one dedicated to the basic operations (addition and multiplication) and another to evaluate the activation function, the total time and cost for the VLSI array implementation of ANNs can be decreased by a factor of two compared with previous work. Taking the advantage of residue number system, the efficiency of each PE can be further increased. Two RNS-based array processor designs are proposed. The first is built by look-up tables, and the second is constructed by binary adders accomplished by the mixed-radix conversion (MRC), such that the hardwares are simple and high speed operations are obtained. The proposed techniques are general enough to be extended to cover other forms of loading and learning algorithms.