DESIGN OF AN EFFICIENT DATA-DRIVEN PIPELINED COMPUTER ARCHITECTURE

Abstract

The combination of dataflow and von Neumann execution models is a recent trend in the design of high performance computers. In this paper, a data-driven hybrid computer architecture is presented. Instead of a program counter, the principle of dynamic data-driven execution is used to control the execution of instructions in a von Neumann-style pipeline architecture. One of the operands of each dyadic instruction is explictly stored in memory, and the memory locations of the stored operands are used as tags. Matching is accomplished by simply checking a present flag and no special matching unit is required. No bubbles will occur in the pipe if sufficient parallelism exists in the program. Experimental results show that the proposed architecture outperforms two previously proposed architectures.