Browsing by Author "Wu, Chia-Hsun"

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AlGaN/GaN HEMTs With Damage-Free Neutral Beam Etched Gate Recess for High-Performance Millimeter-Wave Applications
(2016-11)
Lin, Yen-Ku
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Noda, Shuichi
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Lo, Hsiao-Chieh
;
Liu, Shih-Chien
;
Wu, Chia-Hsun
The electrical performances of gate-recessed AlGaN/GaN high-electron mobility transistors (HEMTs) fabricated using the damage-free neutral beam etching (NBE) method are demonstrated. The NBE method could eliminate the plasma-induced defects generated by irradiating ultraviolet/VUV photons in the conventional inductively coupled plasma reactive ion etching method. The AlGaN/GaN HEMT device fabricated using the new gate recess process exhibited superior electrical performances, including a maximum drain current density (I-DS,I-max) of 1.54 A/mm, low 1/f noise, a current-gain cutoff frequency (f(T)) of 153 GHz, a maximum frequency of oscillation (f(MAX)) of 167 GHz, and a minimum noise figure (NFmin) of 3.28 dB with an associated gain (G(AS)) of 5.06 dB at 54 GHz. Such superior characteristics confirm the inherent advantages of adopting the damage-free NBE process in fabricating GaN devices for millimeter-wave applications.
AlGaN/GaN HEMTs With Damage-Free Neutral Beam Etched Gate Recess for High-Performance Millimeter-Wave Applications (vol 37, pg 1395, 2016)
(2017-01)
Lin, Yen-Ku
;
Noda, Shuichi
;
Lo, Hsiao-Chieh
;
Liu, Shih-Chien
;
Wu, Chia-Hsun
AlGaN/GaN HEMTs With Damage-Free Neutral Beam Etched Gate Recess for High-Performance Millimeter-Wave Applications (vol 37, pg 1395, 2016)
(2017-01)
Lin, Yen-Ku
;
Noda, Shuichi
;
Lo, Hsiao-Chieh
;
Liu, Shih-Chien
;
Wu, Chia-Hsun
AlGaN/GaN MIS-HEMTs With High Quality ALD-Al2O3 Gate Dielectric Using Water and Remote Oxygen Plasma As Oxidants
(2018-12-01)
Wang, Huan-Chung
;
Hsieh, Ting-En
;
Lin, Yueh-Chin
;
Luc, Quang Ho
;
Liu, Shih-Chien
We demonstrate the electrical performances of AlGaN/GaN metal-insulator-semiconductor-high electron mobility transistors (MIS-HEMTs) with high quality Al2O3 gate dielectric deposited by plasma enhanced atomic layer deposition using both H2O and remote O-2 plasma as oxygen sources. Excellent gate-dielectric/GaN interface and Al2O3 film quality were obtained, resulting in a very small threshold voltage hysteresis and a low interface trap density. The MIS-HEMT device exhibited high on/off current ratio of similar to 10(10), steep subthreshold slope, small gate leakage current, low dynamic on-resistance degradation, and effectively current collapse suppression. These results indicate that incorporating remote O-2 plasma in the ALD-Al2O3 deposition process is an effective and simple way to provide high quality gate dielectric for the GaN MIS-HEMTs production.
Analysis of Leakage Current Mechanism for Ni/Au Schottky Contact on InAlGaN/GaN HEMT
(2018-06-06)
Lumbantoruan, Franky
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Wu, Chia-Hsun
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Zheng, Xia-Xi
;
Singh, Sankalp K.
;
Dee, Chang-Fu
The gate leakage mechanism for InAlGaN/GaN high electron mobility transistors (HEMTs) is systematically studied using temperature-dependent gate current-voltage characteristics. The electric field across the barrier layer is calculated through the extracted polarization charge and dielectric constant of the InAlGaN/GaN HEMT. The gate current of the InAlGaN/GaN HEMT is analyzed by fitting the experimental data using Themionic Emission (TE), Poole-Frenkel (PF), and Fowler-Nordheim (FN) tunneling. The results show that 1) reverse leakage current in the thin InAlGaN barrier layer is dominated by FN tunneling due to triangular barrier formation; 2) for thicker barrier layer, the reverse leakage current at low electric field (<2.23MVcm(-1)) is dominated by PF emission; 3) at high electric field near the threshold voltage the FN tunneling dominates. Extraction of effective barrier height by fitting the experimental data with models leads to the suggestion for the improvement of the device leakage current.
Effect of Graded AlxGa1-xN Layers on the Properties of GaN Grown on Patterned Si Substrates
(2012-02-01)
Hsiao, Yu-Lin
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Lu, Lung-Chi
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Wu, Chia-Hsun
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Chang, Edward Yi
;
Kuo, Chien-I
2.2-mu m-thick crack-free GaN films were grown on patterned Si substrates. The crack-free GaN films were obtained by patterning Si substrate and optimizing the graded AlxGa1-xN layers. With the increase of the graded AlxGa1-xN layer thickness, the GaN crystal quality improved as judged from the X-ray diffraction data. By applying multi-AlxGa1-xN layers on the patterned Si substrate, a 31% reduction of tensile stress for the GaN film was obtained as measured by micro-Raman. For the AlGaN/GaN high electron mobility transistor grown on 1 x 1 cm(2) larger patterns, the device exhibits maximum drain current density of 776 mA/mm and maximum transconductance of 101 mS/mm. (c) 2012 The Japan Society of Applied Physics
Halbleitervorrichtung und Verfahren zur Herstellung derselben
(2018-06-21)
CHANG EDWARD YI
;
LIU SHIH-CHIEN
;
HUANG CHUNG-KAI
;
WU CHIA-HSUN
;
HAN PING-CHENG
A semiconductor device includes a substrate, a channel layer, a barrier layer, a recess, a charge trapping layer, a ferroelectric material layer, a gate, a source and a drain. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The barrier layer has a recess, and a portion of the barrier layer under the recess has a thickness. The source and the drain are disposed on the barrier layer. The charge trapping layer covers the bottom of the recess. The ferroelectric material is disposed on the charge trapping layer. The gate is disposed on the ferroelectric material.
High Performance Normally-Off AlGaN/GaN MIS-HEMT Using Charge Storage Technique
(2019-01-01)
Han, Ping-Cheng
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Yang, Chih-Yi
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Lee, Ming-Wen
;
Wu, Jui-Sheng
;
Wu, Chia-Hsun
High-Performance GaN MOSHEMTs Fabricated With ALD Al2O3 Dielectric and NBE Gate Recess Technology for High Frequency Power Applications
(2017-06-01)
Lin, Yen-Ku
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Noda, Shuichi
;
Huang, Chia-Ching
;
Lo, Hsiao-Chieh
;
Wu, Chia-Hsun
High-performance GaN metal-oxidesemi-conductor high-electron-mobility transistors (MOSHEMTs) using Al2O3 gate dielectric deposited by atomic layer deposition (ALD) and damage-free neutral beam etch (NBE) gate recess process for millimeter-wave power applications are demonstrated. The high-quality ALD Al2O3 reduces the gate leakage current of the device and the NBE method eliminates the plasma-induced defects in the nitride materials. The MOSHEMT device fabricated exhibits a high maximum drain current density (I-DS,I-max ) of 1.65 A/mm and a high peak extrinsic transconductance (g(m.ext) ) of 653 mS/mm. The MOSHEMT device also demonstrates excellent RF performances, including f(T)/f(MAX) = 183/191 GHz, NFmin = 2.56 dB with G(AS) = 5.61 dB at 54 GHz, and an output power density of 2.7 W/mm associated with a power-added efficiency of 20.9% and a linear power gain of 9.4 dB at 38 GHz. To the best of our knowledge, the noise performance at 54 GHz is the best reported so far for the AlGaN/GaN HEMTs.
High-Performance LPCVD-SiNx/InAlGaN/GaN MIS-HEMTs With 850-V 0.98-m Omega.cm(2) for Power Device Applications
(2018-01-01)
Wang, Huan-Chung
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Lumbantoruan, Franky Juanda
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Hsieh, Ting-En
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Wu, Chia-Hsun
;
Lin, Yueh-Chin
We demonstrate the electrical performances of the quaternary InAlGaN/GaN MIS-HEMTs with high quality SiNx gate dielectric and surface passivation layer deposited by low pressure chemical vapor deposition (LPCVD) at 780 degrees C. Excellent LPCVD-SiNx/InAlGaN interface and SiNx film quality were obtained, resulting in very high output current density, a very small threshold voltage hysteresis and steep subthreshold slope. The LPCVD-SiNx/InAlGaN/GaN MIS-HEMT device exhibited high on/off current ratio, large gate voltage swing, high breakdown voltage, and very low dynamic on-resistance (R-ON) degradation, meaning effective current collapse suppression compared to the plasma enhanced chemical vapor deposition -SiN x /InAlGaN/GaN MIS-HEMTs. The corresponding specific on-resistance (RoN, sp ) for LPCVD-SiN x device was as low as 0.98 m Omega.cm(2), yielding a high figure of merit of 737 MW/cm(2) . These results demonstrate a great potential of the LPCVD-SiNx /InAlGaN/GaN MIS-HEMTs for high-power switching applications.
High-Performance Normally-OFF GaN MIS-HEMTs Using Hybrid Ferroelectric Charge Trap Gate Stack (FEG-HEMT) for Power Device Applications
(2018-07-01)
Wu, Chia-Hsun
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Han, Ping-Cheng
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Liu, Shih-Chien
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Hsieh, Ting-En
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Lumbantoruan, Franky Juanda
A GaN metal-insulator-semiconductor-high electron mobility transistor (HEMT) using hybrid ferroelectric charge trap gate stack (FEG-HEMT) is demonstrated for normally-OFF operation. The ferroelectric (FE) polarization increases the number of trapped charges in the HfON charge trapping layer, leading to high positive threshold voltage (V-th) shift for the normally-OFF device. Besides, under the positive bias temperature instability (PBTI) test, the internal electric field induced by FE polarization causes smoother slope of the conduction band in FE gate stack, resulting in better V-th stability. With the proposed hybrid FE charge trap gate stack, the device exhibits a high V-th of +2.71 V at I-DS = 1 mu A/mm, a high maximum current density of 820 mA/mm and low on-resistance (R-ON) of 11.1 Omega . mm. The FE device also shows good V-th-temperature stability compared to the non-FE device results. Besides, a high current device with 40 A is also fabricated in this letter to demonstrate the feasibility of the proposed FEG-HEMT device for high power device application.
Improved linearity and reliability in GaN metal-oxide-semiconductor high-electron-mobility transistors using nanolaminate La2O3/SiO2 gate dielectric
(2016-04)
Hsu, Ching-Hsiang
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Shih, Wang-Cheng
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Lin, Yueh-Chin
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Hsu, Heng-Tung
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Hsu, Hisang-Hua
Improved device performance to enable high-linearity power applications has been discussed in this study. We have compared the La2O3/SiO2 AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) with other La2O3-based (La2O3/HfO2, La2O3/CeO2 and single La2O3) MOS-HEMTs. It was found that forming lanthanum silicate films can not only improve the dielectric quality but also can improve the device characteristics. The improved gate insulation, reliability, and linearity of the 8 nm La2O3/SiO2 MOS-HEMT were demonstrated. (C) 2016 The Japan Society of Applied Physics
Improved linearity and reliability in GaN metal-oxide-semiconductor high-electron-mobility transistors using nanolaminate La2O3/SiO2 gate dielectric
(2016-04-01)
Hsu, Ching-Hsiang
;
Shih, Wang-Cheng
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Lin, Yueh-Chin
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Hsu, Heng-Tung
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Hsu, Hisang-Hua
Improved device performance to enable high-linearity power applications has been discussed in this study. We have compared the La2O3/SiO2 AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) with other La2O3-based (La2O3/HfO2, La2O3/CeO2 and single La2O3) MOS-HEMTs. It was found that forming lanthanum silicate films can not only improve the dielectric quality but also can improve the device characteristics. The improved gate insulation, reliability, and linearity of the 8 nm La2O3/SiO2 MOS-HEMT were demonstrated. (C) 2016 The Japan Society of Applied Physics
InGaAs Junctionless FinFETs With Self-Aligned Ni-InGaAs S/D
(2018-01-01)
Chang, Po-Chun
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Hsiao, Chih-Jen
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Lumbantoruan, Franky Juanda
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Wu, Chia-Hsun
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Lin, Yen-Ku
In this paper, the InGaAs junctionless (JL) FinFET with notable electrical performance is demonstrated. The device with W-fin down to 20 nm, EOT of 2.1 nm, and L-G = 60 nm shows high I-ON = 188 mu A/mu m at V-DD = 0.5 V and I-OFF = 100 nA/mu m, I-ON/I-OFF = 5 x 10(5), DIBL = 106 mV/V and SS = 96 mV/dec. The device also exhibits a decent extrinsic transconductance (G(m)) of 1142 mu S/mu m at V-DS of 0.5 V. This high performance is attributed to the moderate doping concentration to ensure the channel carriers could be effectively depleted and the low R-SD realized by self-aligned Ni-InGaAs alloy S/D. Furthermore, we also examine the temperature dependence of the main electrical parameters of the JL transistor.
InGaAs QW-MOSFET Performance Improvement Using a PEALD-AlN Passivation Layer and an In-Situ NH3 Post Remote-Plasma Treatment
(2017-03-01)
Chang, Po-Chun
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Luc, Quang-Ho
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Lin, Yueh-Chin
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Lin, Yen-Ku
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Wu, Chia-Hsun
In this letter, we report on the impact of a PEALD-AlN interfacial passivation layer (IPL) and an in-situ NH3 post remote-plasma (PRP) treatment onto InGaAs quantum-well MOSFETs with Ti/HfO2/InGaAs gate stack. Transistors with gate lengths down to 80 nm have been fabricated and characterized. Due to the excellent interfacial quality of HfO2/AIN/InGaAs, the subthreshold swing and the peak effective channel mobility have been improved to 93 mV/decade and 4253 cm2/Vs, respectively. The drain current has also shown a 4.6-fold enhancement, to 164mA/mm(I-OFF = 100 nA/mu m DD = 0.5V), compared with the HfO2 control device. The results also show that the HfO2/AIN device exhibits better immunity to short-channel effects (SCEs) than the HfO2 control device. Furthermore, during positive bias temperature instability stress, a smaller V-TH and a lower Gm were observed for the sample with an AIN IPL and NH3 PRP treatment, indicating that it is more reliable than the sample without any IPL or plasma treatment.
Investigations of GaN growth on the sapphire substrate by MOCVD method with different AlN buffer deposition temperatures
(2016-04)
Huang, Wei-Ching
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Chu, Chung-Ming
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Wong, Yuen Yee
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Chen, Kai-Wei
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Lin, Yen-Ku
The effects of different AlN buffer deposition temperatures on the GaN material properties grown on sapphire substrate was investigated. At relatively higher AlN buffer growth temperature, the surface morphology of subsequent grown GaN layer was decorated with island-like structure and revealed the mixed-polarity characteristics. In addition, the density of screw TD and leakage current in the GaN film was also increased. The occurrence of mixed-polarity GaN material result could be from unintentional nitridation of the sapphire substrate by ammonia (NH3) precursor at the beginning of the AlN buffer layer growth. By using two-step temperature growth process for the buffer layer, the unintentional nitridation could be effectively suppressed. The GaN film grown on this buffer layer exhibited a smooth surface, single polarity, high crystalline quality and high resistivity. AlGaN/GaN high electron-mobility transistor (HEMT) devices were also successfully fabricated by using the two-step AlN buffer layer. (C) 2016 Elsevier Ltd. All rights reserved.
Normally-OFF GaN MIS-HEMT With F- Doped Gate Insulator Using Standard Ion Implantation
(2018-01-01)
Wu, Chia-Hsun
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Han, Ping-Cheng
;
Quang Ho Luc
;
Hsu, Ching-Yi
;
Hsieh, Ting-En
A normally-OFF GaN metal-insulator-gate high electron mobility transistors with fluorine doped gate insulator has been fabricated using standard ion implantation technique. Fluorine ions with negative charges were doped lightly into both the gate insulator and the partially recessed barrier layer, resulting in high positive threshold voltage (V-th) for the device, meanwhile preserving low ON-resistance. Compared to the fluorine-free and recess-free device, only about 16% increase of ON-resistance was observed for the F- doped devices. The fabricated F- doped device exhibits a threshold voltage of +0.68 V at I-Ds = 5 mu A/mm, a current density of 620 mA/mm, an OFF-state breakdown voltage of 800 V, and high ON/OFF current ratio of 10(10). For thermal stability consideration of fluorine dopant, the V-th-thermal stability test and positive bias temperature instability test were also discussed.
Normally-Off Tri-Gate GaN MIS-HEMTs with 0.76 m Omega center dot cm(2) Specific On-Resistance for Power Device Applications
(2019-08-01)
Wu, Chia-Hsun
;
Chen, Jian-You
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Han, Ping-Cheng
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Lee, Ming-Wen
;
Yang, Kun-Sheng
A GaN metal-insulator-semiconductor high electronmobility transistor (MIS-HEMT) using tri-gate architecture and hybrid ferroelectric charge trap gate stack is demonstrated for normally-off operation. Compared with the conventional planar device, the tri-gate device has the 2-D electron gas (2-DEG) channel exposed on the nanowire sidewalls, so that the trapped charges in the HfON charge-trapping layer can easily deplete the channel from the sidewalls, leading to a high positive threshold voltage (V-th) to realize the normally-off operation. Moreover, through this electrostatic control on the sidewall, a high density of negative charge caused by hybrid ferroelectric charge trap gate stack with the optimized tri-gate structure, the tri-gate device can achieve normally-off GaN device with both low on-resistance (R-ON) and high positive V-th. The designed tri-gate device exhibits a high V-th of +2.61 V at current density (I-DS) = 1 mu A/mm, a high maximum current density (I-DS, MAX) of 896 mA/mm, a low R-ON of 5.0 Omega center dot mm and a high breakdown voltage (BV) of 788 V. To the best of our knowledge, the proposed tri-gate device shows the lowest specific on-resistance (R-ON,R- SP) among reported normallyoff GaN device results with BV > 650 V.
Recess-Free Normally-off GaN MIS-HEMT Fabricated on Ultra-Thin-Barrier AlGaN/GaN Heterostructure
(2019-01-01)
Han, Ping-Cheng
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Wu, Chia-Hsun
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Ho, Yu-Hsuan
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Yan, Zong-Zheng
;
Chang, Edward Yi
In this work, a recess-free thin AlGaN barrier metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT) with high threshold voltage of 3.19V, high maximum drain current of 716 mA/mm and high breakdown voltage of 906V is demonstrated for the first time. Three different thin barrier structures were compared for device performance. In addition, long-term reliability measurements were carried out to investigate the interface quality of the devices with and without gate recess. The recessfree device exhibits a smaller Vth hysteresis and a more stable performance than those of gate recessed devices. Overall, the recess-free thin barrier AlGaN/GaN MIS-HEMT demonstrates promising performance for power switching applications.
Study of E-Mode AlGaN/GaN MIS-HEMT with La-silicate Gate Insulator for Power Applications
(2020-02-01)
Huang, Kuan Ning
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Lin, Yueh-Chin
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Lin, Jia-Ching
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Hsu, Chia Chieh
;
Lee, Jin Hwa
An enhancement-mode (E-mode) AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) with La2O3/SiO2 gate insulator is investigated for high power application. The La2O3/SiO2 composite oxide formed amorphous La-silicate after post deposition annealing. Good oxide film quality and excellent La-silicate/AlGaN interface properties were achieved as evidenced by the capacitance-voltage (C-V) curves and hysteresis effect of the La-silicate on AlGaN/GaN metal-oxide-semiconductor capacitors. As a result, the E-mode AlGaN/GaN MIS-HEMT with La-silicate gate insulator shows good threshold voltage (V-th) stability and demonstrated only slightly increase in the dynamic on-resistance (R-on) after high drain bias stress test. The device also exhibits high current density of 752 mA/mm, high maximum transconductance of 210 mS/mm, low subthreshold swing of 104 mV/decade, and I-ON/I-OFF = 10(7) when tested at V-DS = 10 V. Furthermore, low on-resistance of 7.6 omega mm, high breakdown voltage of 670 V, and excellent delay time of 4.2 ps were achieved, demonstrating the La-silicate MIS-HEMTs have the potential to be used for power electronic applications.