Browsing by Author "Wu, Hsing-Hua"
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Item type:Item, Characteristics and Mechanisms of Silicon-Oxide-Based Resistance Random Access Memory(2013-03-01) ;Chang, Kuan-Chang ;Tsai, Tsung-Ming ;Chang, Ting-Chang ;Wu, Hsing-HuaChen, Jung-HuiTraditionally, a large number of silicon oxide materials are extensively used as various dielectrics for semiconductor industries. In general, silicon oxide cannot be used as resistance random access memory (RRAM) due to its insulating electrical properties. In this letter, we have successfully produced resistive switching and forming-free behaviors by zinc doped into silicon oxide. The current-voltage fitting data show that current transport mechanism is governed by Poole-Frenkel behavior in high-resistance state and Ohm's law in low-resistance state, consisting with filament theory. Additionally, good endurance and retention reliabilities are exhibited in the zinc-doped silicon oxide RRAM.Item type:Item, Charge Quantity Influence on Resistance Switching Characteristic During Forming Process(2013-04-01) ;Chu, Tian-Jian ;Chang, Ting-Chang ;Tsai, Tsung-Ming ;Wu, Hsing-HuaChen, Jung-HuiIn this letter, we presented that the charge quantity is the critical factor for forming process. Forming is a pivotal process in resistance random access memory to activate the resistance switching behavior. However, overforming would lead to device damage. In general, the overshoot current has been considered as a degradation reason during the forming process. In this letter, the quantity of charge through the switching layer has been proven as the key element in the formation of the conduction path. Ultrafast pulse forming can form a discontinuous conduction path to reduce the operation power.Item type:Item, Degradation of Low Temperature Polycrystalline Silicon Thin Film Transistors under Negative Bias Temperature Instability Stress with Illumination Effect(2010) ;Lin, Chia-Sheng ;Chen, Ying-Chung ;Chang, Ting-Chang ;Li, Hung-WeiHsu, Wei-CheThis work investigates negative bias temperature instability (NBTI) in low temperature polycrystalline silicon thin film transistors (LTPS TFTs) in a darkened and in an illuminated environment of different light intensities. Experimental results reveal that the generations of interface state density (N(it)) are identical under various illuminated intensity NBTI stresses. Nevertheless, the degradation of the grain boundary trap (N(trap)) under illumination was more significant than that for the darkened environment, with degradation increasing as illumination intensity increases. This phenomenon is mainly caused by the extra number of holes generated during the illuminated NBTI stress. The increased N(trap) degradation leads to an increase in the darkened environment leakage current. This indicates that more traps are generated in the drain junction region than from carrier tunneling via the trap, resulting in leakage current. Conversely, an increase in N(trap) degradation results in a decrease in the photoleakage current. This indicates that the number of recombination centers increases in the poly-Si bulk, affecting photosensitivity in LTPS TFTs.Item type:Item, High-performance polycrystalline-silicon TFT by heat-retaining enhanced lateral crystallization(2007-08-01) ;Liu, Po-Tsun ;Wu, Hsing-Hua ;光電工程學系 ;顯示科技研究所Department of PhotonicsHigh-performance low-temperature polycrystalline-silicon thin-film transistors (TFTs) have been fabricated by heat-retaining enhanced crystallization (H-REC). In the H-REC technology, a heat-retaining capping layer (HRL) is applied on the prepattern amorphous silicon islands to slow down the heat dissipation effectively. It thereby retains long duration of melting process and further enhances poly-Si-grain lateral growth. With a single shot of laser irradiation, the location-controllable poly-Si active layer with 7-mu m length of grain size can be formed successfully. In addition, in this letter, the H-REC poly-Si TFT with dual gates is studied to enhanced electrical performance and stability.Item type:Item, Low Temperature Improvement Method on Zn:SiOx Resistive Random Access Memory Devices(2013-04-01) ;Chang, Kuan-Chang ;Tsai, Tsung-Ming ;Chang, Ting-Chang ;Wu, Hsing-HuaChen, Kai-HuangTo improve the resistive switching properties of the resistive random access memory (RRAM), the supercritical carbon dioxide (SCCO2) fluid is used as a low temperature treatment. In this letter, the Zn:SiOx thin films are treated by SCCO2 fluid mixed with pure water. After SCCO2 fluid treatment, the resistive switching qualities of the Zn:SiOx thin films are carried out by XPS, fourier transform infrared spectroscopy, and IV measurement. We believe that the SCCO2-treated Zn:SiOx thin film is a promising material for RRAM applications due to its compatibility with portable flat panel display.Item type:Item, Temperature-dependent memory characteristics of silicon-oxide-nitride-oxide-silicon thin-film-transistors(2010-05-03) ;Chen, Shih-Ching ;Chang, Ting-Chang ;Wu, Yung-Chun ;Chin, Jing-YiSyu, Yong-EnThis study investigates the temperature-dependent memory characteristics of polycrystalline silicon thin-film transistors with oxide/nitride/oxide stack gate dielectrics and N(+) poly-Si gate structures for nonvolatile memory application. As the device was programmed by Fowler-Nordheim tunneling at high temperature, some electrons captured in shallow traps could obtain enough thermal energy to de-trap to the gate, resulting in low programming efficiency. As the programming time increases, the hole injection through the blocking oxide from the gate would further lead the threshold voltage to decrease. In addition, the retention characteristic of the device programmed at higher temperature exhibits better charge storage ability. Because the electrons trapped in the shallow traps of the nitride layer can be easily de-trapped when temperature rises, the memory characteristics are mainly dominated by charges stored in the deep traps. (C) 2009 Elsevier B.V. All rights reserved.