Browsing by Author "Yang, Chung-I"

Now showing 1 - 6 of 6

Combined Effects of Light Illumination and Various Bottom Gate Length on the Instability of Via-Contact-Type Amorphous InGaZnO Thin-Film Transistors
(2018-02-01)
Yang, Chung-I
;
Chang, Ting-Chang
;
Liao, Po-Yung
;
Chen, Bo-Wei
;
Chou, Wu-Ching
This paper utilizes electrical analyses and a study of physical mechanisms to investigate metal gate structure-dependent performance in amorphous InGaZnO (a-IGZO) thin-film transistors. The effects of different shielding areas between the IGZO layer and metal gate are investigated. In devices with shorter metal gate lengths, an abnormal rise in capacitance at the off-state in capacitance-voltage (C-V) characteristic curves can be observed. This can be attributed to the stronger electric field induced by the edge of the metal gate under bias sweep when the metal gate length is shorter than the IGZO layer length. Light illumination measurements indicate a negative shift in threshold voltage and an increase in subthreshold-leakage current regardless of relative metal gate length. Moreover, negative threshold voltage shift becomes more severe with a more obvious hump in C-V characteristic curves under back-light illumination of a shorter width device, a phenomenon which has been verified by simulation.
Investigating degradation behaviors induced by hot carriers in the etch stop layer in amorphous InGaZnO thin film transistors with different electrode materials and structures
(2017-12-31)
Yang, Chung-I
;
Chang, Ting-Chang
;
Chen, Bo-Wei
;
Chou, Wu-Ching
;
Liao, Po-Yung
This work investigates the hot carrier effect in via-contact type amorphous indium gallium zinc oxide thin film transistors with various source/drain materials and structures. According to previous research, the redundant drain electrode plays an important role in hot carrier stress-induced degradation, which leads to carrier-trapping in the etch stop layer between the active layer and the redundant drain electrode. Hot carrier stress has different influences on device characteristics, depending on materials and structure. Hot carrier stress causes more electron trapping in the etch stop layer below the redundant drain electrode in the presence of smaller source/drain metal work function or a longer redundant drain electrode. To further verify the mechanisms of the degradation behavior, the barrier height for Fowler-Nordheim-tunneling is extracted by a fitting charge trapping model. It is found that the barrier height for Fowler-Nordheim-tunneling is different for different source/drain materials.
Investigating degradation behaviors induced by mobile Cu ions under high temperature negative bias stress in a-InGaZnO thin film transistors
(2017-09-25)
Chiang, Hsiao-Cheng
;
Chang, Ting-Chang
;
Liao, Po-Yung
;
Chen, Bo-Wei
;
Tsao, Yu-Ching
This letter investigates the effect of negative bias temperature stress (NBTS) on amorphous InGaZnO4 thin film transistors with copper electrodes. After 2000 s of NBTS, an abnormal subthreshold swing and on-current (I-on) degradation is observed. The recovery of the Id-Vg curve after either annealing or positive bias temperature stress suggests that there are some native mobile copper ions in the active layer. Both the existence of copper and the degradation mechanism can be confirmed by AC stress with different frequencies and by transmission electron microscope energy-dispersive X-ray spectroscopy analysis. Published by AIP Publishing.
Surface Engineering of Polycrystalline Silicon for Long-Term Mechanical Stress Endurance Enhancement in Flexible Low Temperature Poly-Si Thin-Film Transistors
(2017-04-05)
Chen, Bo-Wei
;
Chang, Ting-Chang
;
Chang, Kuan-Chang
;
Hung, Yu-Ju
;
Huang, Shin-Pin
The surface morphology in polycrystalline silicon (poly-Si) film is an issue regardless of whether conventional excimer laser annealing (ELA) or the newer metal-induced lateral crystallization (MILC) process is used. This paper investigates the stress distribution while undergoing longterm mechanical stress and the influence of stress on electrical characteristics. Our simulated results show that the nonuniform stress in the gate insulator is more pronounced near the polysilicon/gate insulator edge and at the two sides of the polysilicon protrusion. This stress results in defects in the gate insulator and leads to a nonuniform degradation phenomenon, which affects both the performance and the reliability in thin-film transistors (TFTs). The degree of degradation is similar regardless of bending axis (channel-length axis, channel-width axis) or bending type (compression, tension), which means that the degradation is dominated by the protrusion effects. Furthermore, by utilizing long-term electrical bias stresses after undergoing long-tern bending stress, it is apparent that the carrier injection is severe in the subchannel region, which confirms that the influence of protrusions is crucial. To eliminate the influence of surface morphology in poly-Si, three kinds of laser energy density were used during crystallization to control the protrusion height. The device with the lowest protrusions demonstrates the smallest degradation after undergoing long-term bending.
The effect of asymmetrical electrode form after negative bias illuminated stress in amorphous IGZO thin film transistors
(2017-03-06)
Su, Wan-Ching
;
Chang, Ting-Chang
;
Liao, Po-Yung
;
Chen, Yu-Jia
;
Chen, Bo-Wei
This paper investigates the degradation behavior of InGaZnO thin film transistors (TFTs) under negative bias illumination stress (NBIS). TFT devices with two different source and drain layouts were exanimated: one having a parallel format electrode and the other with UI format electrode. UI means that source/drain electrodes shapes is defined as a forked-shaped structure. The I-V curve of the parallel electrode exhibited a symmetric degradation under forward and reverse sweeping in the saturation region after 1000 s NBIS. In contrast, the I-V curve of the UI electrode structure under similar conditions was asymmetric. The UI electrode structure also shows a stretch-out phenomenon in its C-V measurement. Finally, this work utilizes the ISE-Technology Computer Aided Design (ISE-TCAD) system simulations, which simulate the electron field and IV curves, to analyze the mechanisms dominating the parallel and UI device degradation behaviors. Published by AIP Publishing.
The effect of asymmetrical electrode form after negative bias illuminated stress in amorphous IGZO thin film transistors (vol 110, 103502, 2017)
(2017-04-10)
Su, Wan-Ching
;
Chang, Ting-Chang
;
Liao, Po-Yung
;
Chen, Yu-Jia
;
Chen, Bo-Wei