Browsing by Author "Yang, H. J."

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A program-erasable high-k Hf0.3N0.2O0.5 MIS capacitor with good retention
(2007-10-01)
Yang, H. J.
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Chin, Albert
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Chen, W. J.
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Cheng, C. F.
;
Huang, W. L.
We describe a programmable-erasable MIS capacitor with a single high-kappa Hf0.3N0.2O0.5 dielectric layer. This device showed a capacitance density of similar to 6.6 fF/mu m(2), low program and erase voltages of +5 and -5 V, respectively, and a large Delta V-fb memory window of 1.5 V. In addition, the 25 degrees C data retention was good, as indicated by program and erase decay rates of only 2 and 6.2 mV/dec, respectively. Such device retention is attributed to the deep trapping level of 1.05 eV in the Hf0.3N0.2O0.5.
Comparison of MONOS memory device integrity when using Hf(1-x-y)N(x)O(y) trapping layers with different N compositions
(2008-06-01)
Yang, H. J.
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Cheng, C. F.
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Chen, W. B.
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Lin, S. H.
;
Yeh, F. S.
We have studied the nitrogen composition dependence of the characteristics of TaN/HfLaON/Hf(1-x-y)N(x)O(y)/ SiO(2)/Si MONOS memory devices. By increasing the N composition in the Hf(1-x-y)N(x)O(y) trapping layer, both the memory window And high-temperature retention improved. The Hf(0.3)N(0.2)O(0.5) MONOS device displayed good characteristics in terms of its +/-9-V program/erase (P/E) voltage, 100-mu s P/E speed, large initial 2.8-V memory window, and a ten-year extrapolated retention of 1.8 V at 85 degrees C or 1.5 V at 125 degrees C.
Improved high-temperature leakage in high-density MIM capacitors by using a TiLaO dielectric and an Ir electrode
(2007-12-01)
Cheng, C. H.
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Pan, H. C.
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Yang, H. J.
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Hsiao, C. N.
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Chou, C. P.
We have fabricated high-kappa. TaN/Ir/TiLaO/TaN metal-insulator-metal capacitors. A low leakage current of 6.6 x 10(-7) A/cm(2) was obtained at 125 degrees C for 24-fF/mu m(2) density capacitors. The excellent device performance is due to the combined effects of the high-kappa TiLaO dielectric, a high work-function Ir electrode, and large conduction band offset.
Improving the retention and endurance characteristics of charge-trapping memory by using double quantum barriers
(2008-07-01)
Lin, S. H.
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Yang, H. J.
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Chen, W. B.
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Yeh, F. S.
;
McAlister, Sean P.
We have studied the performance of double-quantum-barrier [TaN - Ir(3)Si] - [HfAlO - LaAlO(3)] - Hf(0.3)N(0.2)O(0.5) - [HfAlO - SiO(2)]-Si charge-trapping memory devices. These devices display good characteristics in terms of their +/- 9-V program/erase (P/E) voltage, 100-mu s P/E speed, initial 3.2-V memory window, and ten-year extrapolated data retention window of 2.4 V at 150 degrees C. The retention decay rate is significantly better than single-barrier MONOS devices, as is the cycled retention data, due to the reduced-interface trap generation.