Browsing by Author "Zou, Xuming"

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Dielectric Engineering of a Boron Nitride/Hafnium Oxide Heterostructure for High-Performance 2D Field Effect Transistors
(2016-03-09)
Zou, Xuming
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Huang, Chun-Wei
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Wang, Lifeng
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Yin, Long-Jing
;
Li, Wenqing
A unique design of a hexagonal boron nitride (h-BN)/HfO2 dielectric heterostructure stack is demonstrated, with few-layer h-BN to alleviate the surface optical phonon scattering, followed by high-kappa HfO2 deposition to suppress Coulombic impurity scattering so that high-performance top-gated two-dimensional semiconductor transistors are achieved. Furthermore, this dielectric stack can also be extended to GaN-based transistors to enhance their performance.
High Mobility MoS2 Transistor with Low Schottky Barrier Contact by Using Atomic Thick h-BN as a Tunneling Layer
(2016-10-05)
Wang, Jingli
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Yao, Qian
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Huang, Chun-Wei
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Zou, Xuming
;
Liao, Lei
High-performance MoS2 transistors are developed using atomic hexagonal boron nitride as a tunneling layer to reduce the Schottky barrier and achieve low contact resistance between metal and MoS2. Benefiting from the ultrathin tunneling layer within 0.6 nm, the Schottky barrier is significantly reduced from 158 to 31 meV with small tunneling resistance.
Interface Engineering for High-Performance Top-Gated MoS2 Field-Effect Transistors
(2014-09-24)
Zou, Xuming
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Wang, Jingli
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Chiu, Chung-Hua
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Wu, Yun
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Xiao, Xiangheng
Experimental evidence of the optimized interface engineering effects in MoS2 transistors is demonstrated. The MoS2/Y2O3/HfO2 stack offers excellent interface control. Results show that HfO2 layer can be scaled down to 9 nm, yet achieving a near-ideal sub-threshold slope (65 mv/dec) and the highest saturation current (526 mu A/mu m) of any MoS2 transistor reported to date.
Low Interface Trap Densities and Enhanced Performance of AlGaN/GaNMOS High-Electron Mobility Transistors Using Thermal Oxidized Y2O3 Interlayer
(2015-12-01)
Liao, Chongnan
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Zou, Xuming
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Huang, Chun-Wei
;
Wang, Jingli
;
Zhang, Kai
AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistors (MOS-HEMTs) with Y2O3 interlayer have been investigated to improve the interface quality. With the HfO2/Y2O3 stack gate dielectrics, the devices show a saturated drain current density of up to similar to 943 mA/mm. Meanwhile, the pulsed I-d-V-g measurement indicates interface traps are as low as 5.2 x 10(11) cm(-2), and the pulsed-IV measurement exhibits great resistance to current collapse. Furthermore, the devices also present good reliability under negative bias stress. Therefore, the interface engineering based on Y2O3 has a potential to open up a new avenue to high-performance AlGaN/GaN MOS-HEMTs.