Browsing by Issue Date, starting with "2002-05-01"

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Optimum design for a thermally stable multifinger power transistor
(2002-05-01)
Liao, CH
;
Lee, CP
;
Wang, NL
;
Lin, B
;
電子工程學系及電子研究所
The thermal stability of multifinger bipolar transistors has been analyzed theoretically. Coupled equations are solved to study the onset of instability and its dependence on the distributions of ballasting resistors. Analytical expressions were derived for the emitter ballasting distribution for optimum stable operation. Compared to conventional methods with uniform ballasting, the optimized design can significantly increase the stable operating current of the transistor. An absolutely stable operating condition is also derived. At this condition, the device never becomes unstable.
Locating free positions in LR(k) grammars
(2002-05-01)
Ouyang, ST
;
Wu, PC
;
Wang, FJ
;
資訊工程學系
;
Department of Computer Science
LR(k) is the most general category of linear-time parsing. Before a symbol is recognized in LR parsing, it is difficult to invoke the semantic action associated with the symbol. Adding semantic actions to an LR(k) grammar may result in a non-LR(k) grammar. There are two straightforward approaches adopted by practitioners of parser generators. The first approach is to delay all semantic actions until the whole parse tree is constructed. The second is to add semantic actions to the grammar by chance. This paper presents an efficient algorithm for finding positions (called free positions) that can freely put semantic actions into an LR(k) grammar. The speedups of our method range from 2.23 to 15.50 times for the eight tested grammars.
Optimal biorthogonal transform for colored noise suppression with subband Wiener filtering
(2002-05-01)
Phoong, SM
;
Lin, YP
;
電控工程研究所
;
Institute of Electrical and Control Engineering
It is well-known that the Karhunen-Loeve transform (KLT) is optimal for white noise suppression. Recently, Akkarakaran and Vaidyanathan showed that for the case of colored noise, if both the noise and signal have a common KLT, then the KLT is optimal for subband noise suppression. In this paper, we will derive the optimal transform (not restricting to the class of unitary transforms) for the noise suppression problem when the signal and noise have arbitrary spectrum.
Improvements on the duality based method used in solving optimal power flow problems
(2002-05-01)
Lin, CH
;
Lin, SY
;
Lin, SS
;
電控工程研究所
;
Institute of Electrical and Control Engineering
To improve the previously developed dual-type (DT) method used in solving optimal power flow (OPF) problems with large number of thermal-limit constraints, we propose two new techniques in this paper. The first one is a graph-method based decomposition technique which can decompose the large-dimension projection problem, caused by the large number of thermal-limit constraints, into several independent medium-dimension projection subproblems at the expense of slight increment of the dual problem's dimension. The second technique is an active-set strategy based DT method which can solve the medium-dimension projection subproblems efficiently. We have used the DT method embedded with these two new techniques in solving numerous OPF's with large number of thermal-limit constraints. The test results show that the proposed techniques are very efficient and effectively improve the DT method for handling large number of thermal-limit constraints.
Varying appearance speed problem in system modeling and a solution via rate independent memory
(2002-05-01)
Wei, JD
;
Sun, CT
;
資訊工程學系
;
Department of Computer Science
Conventional system models such as the finite impulse response (FIR.) model, autoregressive external input (ARX) model, time delay neural network (TDNN), and recurrent neural network (RNN) depend on short-term memory when modeling a discrete time system. However, short-term memory can be inefficient with a varying appearance speed of I/O data. This inefficiency is referred to herein as the Varying Appearance Speed Problem (VASP) and demonstrated by analyzing impulse and frequency responses. Simulation results indicate that the varying appearance speed leads to asymmetrical cycles. Unable to prevent the memory effect from extensively disturbing the next output cycle, conventional models simulate the systems inaccurately. A solution using rate independent memory is then proposed. Only concerned with the previous extreme inputs, rate independent memory differs from short-term memory and potentially prevents a system model from the impact of varying appearance speeds. To demonstrate the VASP and verify the proposed model, this study conducts three experiments, i.e. (a) learning random step trajectories of circular and trefoil shapes, (b) modeling the relationship between the economic leading and coincident indexes, (c) simulating the connection between the ground-water level and land subsidence. In contrast to conventional models, the model presented here performs better in terms of mean square errors.
Effect of pulse frequency on leveling and resistivity of copper coatings
(2002-05-01)
Chen, CF
;
Lin, KC
;
材料科學與工程學系
;
Department of Materials Science and Engineering
Pulse-and DC-plated copper films on wafers were investigated with respect to their applicability as advanced interconnect materials. Pulse frequency was varied to determine its influence on the topography, grain size, and electrical resistivity of electroplated copper films. Morphology and scanning electron microscopy (SEM) studies were conducted on these samples. Smooth and dense coatings were obtained at the optimal frequency of 100 Hz, which displayed the smallest electrical resistance. The leveling capacity of submicron features was also optimized at this frequency.
Distortionless pulse-train propagation in a nonlinear photonic bandgap structure doped uniformly with inhomogeneously broadening two-level atoms
(2002-05-01)
Tseng, HY
;
Chi, S
;
光電工程學系
;
Department of Photonics
The pulse propagation in a one-dimensional nonlinear photonic bandgap (PBG) structure doped uniformly with inhomogeneously broadening two-level atoms is investigated. The Maxwell-Bloch equations describing pulse propagation in such a uniformly doped PBG structure are derived first and further reduced to effective nonlinear coupled-mode equations. An exact analytic pulse-train solution to these effective coupled-mode equations is obtained. Such a distortionless pulse-train solution is given by sinusoidal functions with a DC background and a modulated phase. Numerical examples of the distortionless pulse train in a silica-based PBG structure doped uniformly with Lorentzian line-shape two-level atoms are shown.
Substrate-triggered ESD clamp devices for use in power-rail ESD clamp circuits
(2002-05-01)
Ker, MD
;
Chen, TY
;
Wu, CY
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Ne electrostatic discharge (ESD) clamp devices for using in power-rail ESD clamp circuits with the substrate-triggered technique ire proposed to improve ESD level in a limited silicon area. The parasitic n-p-n and p-n-p bipolar junction transistors (BJTs) in the CMOS devices ire used to form the substrate-triggered devices Cor ESD protection. Four substrate-triggered de-ices are proposed and investigated in this work, which are named as the substrate-triggered lateral BJT, the substrate-triggered vertical BJT, the substrate-triggered double BJT and the double-triggered double BJT. An RC-based ESD-detection Circuit Is used to generate the triggering Current to turn on the proposed substrate-triggered devices. In order to trigger on the parasitic bipolar transistors more effectively, the symmetric multiple-cell square-type layout method is used to realize these substrate-triggered devices. The power-rail ESD clamp circuits, with such substrate-triggered devices have been fabricated in a 0.6-mum CMOS process. Experimental results have shown that the substrate-triggered device with double-BJT Structure can provide 200%, higher ESD robustness in per silicon area, as compared to the NMOS with the traditional gate-driven design, (C) 2002 Elsevier Science Ltd. All rights reserved.
A neural-network approach for semiconductor wafer post-sawing inspection
(2002-05-01)
Su, CT
;
Yang, T
;
Ke, CM
;
工業工程與管理學系
;
Department of Industrial Engineering and Management
Semiconductor wafer post-sawing requires full inspection to assure defect-free outgoing dies. A defect problem is usually identified through visual judgment by the aid of a scanning electron microscope. By this means, potential misjudgment may be introduced into the inspection process due to human fatigue. In addition, the full inspection process can incur significant personnel costs. This research proposed a neural-network approach for semiconductor wafer post-sawing inspection. Three types of neural networks: backpropagation, radial basis function network, and learning vector quantization, were proposed and tested. The inspection time by the proposed approach was less than one second per die, which is efficient enough for a practical application purpose. The pros and cons for the proposed methodology in comparison with two other inspection methods, visual inspection and feature extraction inspection, are discussed. Empirical results showed promise for the proposed approach to solve real-world applications. Finally, we proposed a neural-network-based automatic inspection system framework as future research opportunities.
An explicit model for a quantum channel in 2DEG
(2002-05-01)
Fedirko, VA
;
Chen, MH
;
Chiu, CC
;
Chen, SF
;
Wu, KH
A two-parametric model for a channel in a two-dimensional electron gas (2DEG) is proposed which allows for the explicit analytical solution for the problem of quantum electron transport through the constriction. Conductance step smearing appears naturally and a simple criterion for the step occurrence in terms of channel parameters is given. (C) 2002 Elsevier Science Ltd. All rights reserved.
A 0.99 mu A operating current Li-ion battery protection IC
(2002-05-01)
Shyu, YS
;
Wu, JC
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A lithium-ion (Li-ion) battery protection IC with an average current of 0.99 muA (at a battery voltage of 3.6 V) and a standby current (after detecting over-discharge) less than 0.01 muA is presented. This low power performance is achieved via a power-on duty-cycle technique. The protection circuit samples the voltage of the battery periodically and powers down during the rest of time. This Li-ion battery protector provides overcharge, over-discharge, excess-current and short circuits protection. This protection IC was implemented in a 0.6-mum CMOS technology and the active area is 880 mum x 780 mum.
Nonlinear effects of energy band structures on optical transitions in quantum dots
(2002-05-01)
Wu, CC
;
Lin, CJ
;
應用數學系
;
電子工程學系及電子研究所
;
Department of Applied Mathematics
The quantum theory of nonlinear effects for optical transitions of electrons in quasi-zero dimensional (Q0D) quantum dots fabricated from n-type III-V compound semiconductor materials such as n-type GaAs has been studied due to the nonparabolicity of energy band structures. We use the effective mass approximation for carriers in the quantum dots. Most realistic quantum dot systems contain the box with a thickness c and the lateral width (a, b). Using the time-independent perturbation theory, the first order correction of the eigenfunctions and eigenvalues for the system has been calculated. And the free-carrier absorption coefficient may be calculated for Q0D quantum dots from n-type GaAs where the polar optical phonon scattering is dominant. Our results show that the free-carrier absorption coefficient in Q0D quantum dots increases quite rapidly with increasing temperature in the region of low temperatures. When temperatures are larger than 100 K, the free-carrier absorption coefficient increases slowly with temperature. This shows that the nonlinear property of energy band structures due to the nonparabolicity plays an important role in low temperatures. The discussion about the dot size effect of the quantum confinement region in n-type GaAs quantum dots has also been given. (C) 2002 Published by Elsevier Science B.V.
Design of instruction address queue for high degree x86 superscalar architectures
(2002-05-01)
Chiu, JC
;
Wang, MJY
;
Chung, CP
;
資訊工程學系
;
Department of Computer Science
A major hurdle of recent x86 superscalar processor designs is limited instruction issue rate due to the overly complex x86 instruction formats. To alleviate this problem, the machine states must be preserved and the instruction address routing paths must be simplified. We propose an instruction address queue, whose queue size has been estimated to handle saving of instruction addresses with three operations: allocation, access, and retirement. The instruction address queue will supply the stored instruction addresses as data for three mechanisms: changing instruction flow, updating BTB, and handling exceptions. It can also be used for internal snooping to solve self-modified code problems. Two CISC hazards in the x86 architectures, the variable instruction length and the complex addressing mode, have been considered in this design. Instead of the simple full associative storing method in lower degree (< 4) superscalar systems, the line-offset method is used in this address queue. This will reduce by 1/3 the storage space for a degree-5 superscalar x86 processor with even smaller access latency. We use synthesis tools to analyze the design, and show that it produces optimized results. Because the address queue design can keep two different line addresses in an instruction access per cycle, this method can be extended for designing a multiple instruction block issue system, such as the trace processor.
Effect of silane flowing time on W volcano and plug formation
(2002-05-01)
Chang, HL
;
Juang, FL
;
Kuo, CT
;
交大名義發表
;
National Chiao Tung University
W volcano is one of the defects in semiconductor devices. The presence of defects causes metal line bridges and thus device malfunction. The decomposition of SiH4 gas into Si atoms as nucleation sites is crucial for W film deposition. Here, we investigate the phenomenon in which the flowing time of SiH4 gas appears to dominate both W volcano formation and the degree of W film filling in a hole; the density of W volcanoes is increased with an increase of SiH4 flowing time. The volcano-free process and step-coverage of a W plug with various SiH4 flowing times are evaluated, and a formation mechanism is also proposed.
Traceability on low-computation partially blind signatures for electronic cash
(2002-05-01)
Hwang, MS
;
Lee, CC
;
Lai, YC
;
資訊工程學系
;
Department of Computer Science
In 1998, Fan arid Lei proposed a partially blind signature scheme that could reduce the computation load and the size of the database for electronic cash systems. In this Letter, we show that their scheme could not meet the untraceability property of a blind signature.
Corner singularities in bi-material Mindlin plates
(2002-05-01)
Huang, CS
;
土木工程學系
;
Department of Civil Engineering
An eigenfunction expansion solution is first developed to find stress singualrities for bi-material wedges by directly solving the governing equations of the Mindlin plate theory in terms of displacement components. The singularity orders of moments and shear forces at corners are determined from the corresponding asymptotic solutions having the lowest order in r and satisfying the radial boundary conditions and continuity conditions. The present solution is applied to thoroughly examine the singularities occurring at the interface joint of bonded dissimilar isotropic plates and at the vertex of a bi-material wedge with two simply supported radial edges. The corresponding characteristic equations for determining the singularity orders of moments and shear forces are explicitly given. The singularity orders of moment are shown in graphic form as functions of the flexural rigidity ratio and corner angle, while the shear force singularity orders are given as functions of the corner angle and the shear modulus ratio multiplied by the thickness ratio. The order of moment singularity obtained here for bonded dissimilar plates is also compared with that based on the classical plate theory. (C) 2002 Elsevier Science Ltd. All rights reserved.
Optimum design for a thermally stable multifinger power transistor with temperature-dependent thermal conductivity
(2002-05-01)
Liao, CH
;
Lee, CP
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The thermal stability of multifinger bipolar transistors has been analyzed theoretically. Coupled equations are solved to study the onset of instability and its dependence on the distributions of ballasting resistors. We extended our previous work on the multiple-finger transistor thermal stability from the simple coupled thermal-electrical feedback equation to the more accurate I-V equation and taking the temperature dependence of the thermal conductivity into consideration. Transistors with three-fingers and N-fingers have been analyzed. Two design procedures, uniform current design and uniform temperature design, of the best ballasting resistor distribution for optimum thermal stability operation were developed. Using these design flows, we can design the best ballasting resistor needed for thermal stable operation under the specified current level or specified junction temperature.
Interfacial mechanism studies of electroless plated Cu films on a-Ta : N layers catalyzed by PIII
(2002-05-01)
Lin, JH
;
Lee, TL
;
Hsieh, WJ
;
Lin, CC
;
Kou, CS
This study evaluated the interface reaction and crystallography of the electroless plated copper film (similar to0.2 mum thick) catalyzed by plasma immersion ion implanted (PIII) Pd on the 150-Angstrom-thick amorphous tantalum nitride (a-Ta:N) barrier layer. The copper plated specimens were annealed at various temperatures in an ambient atmosphere of 90% nitrogen + 10% hydrogen mixed gases. Sheet resistivity, Auger electron spectroscopy (AES) analyses showed that the PIII Pd atoms were diffused into the copper layer from the interface of a-Ta:N and copper layers after 500 degreesC annealing for 1 h. Results based on x-ray diffraction (XRD) and high-resolution transmission electron microscopy (HRTEM) showed a phase transformation from a-Ta:N into crystallized Ta2N phase at annealing. The Cu(111) texture was strengthened at 300degreesC annealing for I h because of the relaxation of the residual stress and recovery of the copper film. The texture was reduced at the 500 degreesC annealing for I h because of the copper grain growth. The adhesion strength of copper films on a-Ta:N barrier layer was enhanced by the annealing because of the interdiffusion of copper layer, Pd clusters and a-Ta:N barrier layer. The annealing temperatures lower than 300 degreesC help to reduce the electric resistivity of copper film, to strengthen the Cu(111) preferred orientation. and to enhance the adhesion strength of copper films on a-Ta:N layer. However, the specimen annealed at 500 'C manifested the diffusion of Pd atoms into the copper film and resulted in a significant increase of the electric resistivity of copper film. (C) 2002 American Vacuum Society.
Anomalous variations of OFF-state leakage current in poly-Si TFT under static stress
(2002-05-01)
Chang, KM
;
Chung, YH
;
Lin, GM
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In this letter, we study the anomalous variations of the OFF-state leakage current (I-OFF) in n-channel poly-Si thin-film transistors (TFTs) under static stress. The dominant mechanisms for the anomalous I-OFF can be attributed to 1) I-OFF increases due to channel hot electrons trapping at the gate oxide/channel interface and silicon grain boundaries and 2) I-OFF decreases due to hot holes accumulated/trapped near the channel/bottom oxide interface near the source region. Under the stress of high drain bias, serious impact ionization effect will occur to generate hot electrons and hot holes near the drain region. Some of holes will be injected into the gate oxide due to the vertical field (similar to(V_stress - V_ - Dstress) /T-ox) near the drain and the others will be migrated from drain to source along the channel due to lateral electric field (similar toV_Dstress/L-CH).
An approach to smooth foreign agent handoff
(2002-05-01)
Tseng, CC
;
Chi, KH
;
Tsai, CH
;
資訊工程學系
;
Department of Computer Science
For ubiquitous computing and communication, a mobile node needs to change upon movements its network- and link-layer points of attachment to the Internet. Conventionally. the network-layer protocol is unaware of the link-layer changes, so IP datagrams to and from a moving node could be lost. Considerable system performance degradation might therefore result. This paper presents a scheme to integrate the handoff procedures of the two layers in the context of Mobile IP with route optimization. Experiment results show that our scheme is promising and can reduce packet loss due to host migrations substantially.