標題: | 異質整合Mixed-Signal/MEMS CMOS無線射頻收發機設計研發---子計畫二:可重組式 Mixed-Signal/MEMS 9G~10GHz射頻接收端設計(I) Reconfigurable Mixed-Signal/MEMS 9G~10GHz Receiver Design(I) |
作者: | 郭建男 KUO CHIEN-NAN 國立交通大學電子工程學系及電子研究所 |
關鍵字: | CMOS 毫米波積體電路;可重組式;直接降頻接收機;低雜訊放大器;混波器;相位調整器;六埠接收機;微機電;CMOS RFIC;reconfigurable;direct conversion receiver;low-noise amplifier;mixer;phase shifter;6-port receiver;MEMS |
公開日期: | 2009 |
摘要: | 本計劃目的在研究使用異質整合技術,應用於多模多頻段無線通訊系統,達到0.9~10GHz寬頻可重組式性能目標。為達到此頻寬,內容將利用MEMS元件優越特性提升設頻電路效能。架構上應用六埠接收機架構突破傳統正交訊號解調架構的問題。在本計劃中,關鍵電路例如可重組式低雜訊放大器將會討論及設計。配合六埠架構,實現完整系統,並利用已開發的微機電設計平台驗證設計流程。因此在射頻電路設計可以大幅降低複雜度,簡化難度,降低功率消耗,及降低成本。 This project is targeting to develop heterogeneous integrated technology for 0.9~10GHz broadband reconfigurable receiver front-end applied to multi-standard communications. To accommodate for the broad bandwidth, MEMS technology shall be addressed, incorporated into the standard CMOS technology to pursue for better system performance. As such, the six-port receiver architecture will be adopted to avoid those common issues exhibited in the traditional I/Q demodulators. Key circuit blocks include reconfigurable low-noise amplifiers (LNA) shall be carefully studied for the broadband concern. The six-port receiver will be realized and verified by developed MEMS design platform. The design complexity thus will be greatly reduced to achieve low cost and low power. |
官方說明文件#: | NSC98-2220-E009-064 |
URI: | http://hdl.handle.net/11536/101861 https://www.grb.gov.tw/search/planDetail?id=1907868&docId=316304 |
顯示於類別: | 研究計畫 |