具通信功能之車用功率系統晶片---子計畫一：車用電源線通訊系統之類比前端積體電路設計(I)

Abstract

本子計畫所提出之應用於車用電源線通訊系統之 transceiver 的基本架構包含一 signal conditioning circuits、一個 anti-aliasing filter、一個類比數位轉換器 (ADC) 、與一個數位類比轉換器(DAC)。 對發射端(transmitter end)而言，通訊訊號經由基頻處理器(baseband processor)處 理後，送至DAC 轉成類比訊號，再藉由AC coupling 電容偶合至DC power line 上。 對接收端(receiver end)而言，先藉由AC coupling 電容將電源線上之通訊訊號的共模 訊號調整至適當位準後，再經signal conditioning circuits 與 anti-aliasing filter 處理，將訊號調整制適當位準並將雜訊作初步濾除，最後將輸出送至ADC 轉成數位訊號 後，再交由基頻處理器處理。 經初步估算，該ADC 需具備10 位元解析度與10MS/s 的取樣率方能提供所需的通訊頻寬。 對於如此的規格而言可能的ADC 架構包含積差式調變器(Sigma-Delta modulator)、管 線式(pipelined)類比數位轉換器、與循序逼近式(successive approximation)類比數 位轉換器。然而，受限於電池的有限容量，我們必須儘可能降低各元件的功耗。管線式 類比數位轉換器與積差式調變器皆需要運算放大器作為基本元件而積差式調變器更需 要適當的超頻取樣率(oversampling ratio)，所以兩者的耗能可能較高。另一方面，循 序逼近式類比數位轉換器不需要高效能的運算放大器，可以大幅降低類比數位轉換器的 功耗。 故在本計畫之在第一年之中，我們將實現一個具備10 位元解析度與10MS/s 的取樣率的 低耗能循序逼近式類比數位轉換器，其功耗小於1mW。 由於汽車內之雜訊非常嚴重，在設計signal conditioning circuits 與 anti-aliasing filter 時，必須設法解決雜訊問題。而雜訊問題又與通訊通道模型有關。所以本計畫在 計畫的第二年將粗估該通訊通道模型下並據以進行signal conditioning circuits 與 anti-aliasing filter 的設計，完成雛型製作。 同時，我們也將在第三年完成該數位類比轉換器，並將所設計之電路與其他子計畫成果 進行整合，完成整合型系統晶片。並將實地展示系統運作。

The shortage of our major energy source, petroleum, seriously impacts our economy. As the gasoline price keeps going ever higher, seeking for an alternative energy source to replace the petroleum is a must. Besides, the global warming issue due to the consumption of petrol fuels also attracts much attention. For the coming era, we have to look for a cleaner energy source. Electricity is a good candidate. It can be generated by nuclear, wind, water, and sun. All these energy sources produce no carbon-dioxide. Vehicles are one of major power consumption sources of human activity. Thus, we believe electricity powered vehicles will have a bright future, and it does happen right now. Some hybrid cars already have been commercialized. Modern cars have lots of electronic systems on them to control the actuation, safety, and entertainment systems. Currently, it takes quite complex routing wires in the cars. As a result, the reliability and the maintenance of the electronic systems become issues. Since all electronic devices must be powered by their power lines, if the signals can be transmitted through the power lines, the routing wires in cars can be greatly simplified to address the possible issues mentioned above. Therefore, this joint project is going to develop a dc power line communication (PLC) system for vehicles in the coming 3 years. The system plans to use QAM as its modulation scheme to increase its communication capacity. A high data rate is substantial for the target system since some critical commands in the vehicles must be real-time. ADSL is a similar system that also employs QAM. To implement such a system, a high performance ADC is mandatory. It is estimated that the ADC should achieve 10-bit resolution and be able to operate at a sampling rate higher than 10MS/s. Due to the limited energy capacity of batteries, the power consumption of each component in the IC should be as low as possible. Sigma-Delta modulator, pipelined ADC, and successive approximation (SA) ADC are possible candidates. However, the pipelined ADC and Sigma-Delta modulator require operational amplifiers whose power consumption is considerable. Besides, the Sigma-Delta modulator needs a moderate over-sampling ratio that makes the power consumption of its operational amplifier even higher. On the other hand, the SA ADC does not need any high power amplifier. It may be more suitable for this application. What this research project proposes are: In the first year, we will design a 10-bit, 10 MS/s SA ADC whose power is less than 1mW. In the second year, we will roughly estimate the channel model and use it to design the signal conditioning circuits, the anti-aliasing filter. In the third year, we will finish the design of a 10-bit, 10MS/s DAC and integrating all the circuits with the results of the other sub-projects. Finally, we will demonstrate a real PLC system.