Method for forming gate pattern for electronic device

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DC Field	Value	Language
dc.contributor.author	Chen, Szu-Hung	en_US
dc.contributor.author	Kuo, Chien-I	en_US
dc.contributor.author	Chang, Edward Yi	en_US
dc.date.accessioned	2014-12-16T06:16:07Z	-
dc.date.available	2014-12-16T06:16:07Z	-
dc.date.issued	2007-03-22	en_US
dc.identifier.govdoc	H01L021/4763	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/105669	-
dc.description.abstract	A method for forming a gate pattern for an electronic device, comprising steps of: providing a substrate, whereon a first photo-resist layer is formed; performing a first photo-lithography process so as to form a first pattern with a first width on the substrate; forming a second photo-resist layer, covering the first pattern and the first photo-resist layer on the substrate; and performing a second photo-lithography process, which is shifted from the first photo-lithography process, so as to form a second pattern with a second width on the substrate; wherein the second width is smaller than the first width.	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	Method for forming gate pattern for electronic device	zh_TW
dc.type	Patents	en_US
dc.citation.patentcountry	USA	zh_TW
dc.citation.patentnumber	20070066051	zh_TW
Appears in Collections:	Patents

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