標題: A 6Gbps serial link transmitter with pre-emphasis
作者: Chu, Chang-Min
Chuang, Chih-Hua
Lin, Chi-Hsien
Jou, Shyh-Jye
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2007
摘要: In this paper, we propose a novel 6Gbps SATA transmitter. The transmitter is constructed by PISO, driver, pre-emphasis and PLL for a 1 similar to 5 meter cable. A test chip of transmitter with PLL and on-chip termination is implemented to verify the design methodology. The overall circuit is implemented in TSMC 0.18um 1P6M 1.8V CMOS process. The whole measured transmitter jitter is about 44ps and the power consumption is 68mW for 6Gbps case.
URI: http://hdl.handle.net/11536/12301
ISBN: 978-1-4244-0582-4
期刊: 2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Proceedings of Technical Papers
起始頁: 73
結束頁: 74
顯示於類別:會議論文