Path-Based Cell Flipping Optimization for Wirelength Reduction and Routability

Abstract

Wirelength reduction is always a concern in almost every methodology in physical design optimization. A recent study shows that solving cell flipping optimally can further reduce wirelength without affecting the original placement solution. In practical observation, there are still a lot of placed standard 2-pin logic cells which can be further mirrored to decrease the total routing length. In this work, we provide a path-based optimization methodology that can be applied before detailed routing, and this will help the router to improve the final routing length. This method can also be easily applied in the ECO stage to prevent the wire crossing effects, without impacting the local routability. A number of real industry tape-out cases are experimented to illustrate the effectiveness of the proposed methodology and to get shorter wirelength.