A Lightweight 1.16 pJ/bit Processor for the Authenticated Encryption Scheme KetjeSR

Abstract

This paper presents the results of the first ASIC implementation of the authenticated encryption scheme KetjeSR. The design covers the encryption and decryption operation in combination with a handshake protocol for the data transfer. The chip implementation was done in a TSMC 90nm GUTM process. The encryption/decryption module has an area footprint of 12.2kGE. The processor reaches an end-to-end throughput of 2.08 Gbps when running at a clock frequency of 130 MHz. The design was further optimized for low power and consumes 2.421 mW. The optimization is based on the reuse of the permutation function in combination with extensive pipelining In terms of energy, the encryption operation costs 1.16 pJ/bit.