標題: | A novel framework for multilevel routing considering routability and performance |
作者: | Lin, SP Chang, YW 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2002 |
摘要: | We propose in this paper a novel framework for multilevel routing considering both routability and performance. The two-stage multilevel framework consists of coarsening followed by uncoarsening. Unlike the previous multilevel routing, we integrate global routing, detailed routing, and resource estimation together at each level of the framework, leading to more accurate routing resource estimation during coarsening and thus facilitating the solution refinement during uncoarsening. Further, the exact routing information obtained at each level makes our framework more flexible in dealing with various routing objectives (such as crosstalk, power, etc). Experimental results show that our approach obtains significantly better routing solutions than previous works. For example, for a set of 11 commonly used benchmark circuits, our approach achieves 100% routing completion for all circuits while the previous multilevel routing, the three-level routing, and the hierarchical routing can complete routing for only 3, 0, 3 circuits, respectively. In particular, the number of routing layers used by our router is even smaller. We also have performed experiments on timing-driven routing. The results are also very promising. |
URI: | http://hdl.handle.net/11536/18767 |
ISBN: | 0-7803-7607-2 |
期刊: | IEEE/ACM INTERNATIONAL CONFERENCE ON CAD-02, DIGEST OF TECHNICAL PAPERS |
起始頁: | 44 |
結束頁: | 50 |
顯示於類別: | 會議論文 |