標題: Random Line selected Charge Accumulation (RLCA) CCD readout structure for high frame rate infrared image application
作者: Horng, GJ
Chang, CY
Yen, YC
Wang, WL
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: PtSi Schottky-barrier detector;random line selected charge accumulation;charge coupled device;line-addressed charge-accumulation
公開日期: 2000
摘要: A 512x512 monolithic Platinum Silicide Schottky Barrier detector array with random line selectable operation was proposed. The device modified from an interline CCD configuration by adapt a Random Line selected Charge Accumulation charge-coupled device on the vertical register and four tap readout on the horizontal CCD register to achieve a high frame rate and high fill factor operation. A 9-bit digital decoder is used to select which line of the sensor array that transfer their signals to the vertical CCD register. Accompanied with the vertical reset drain circuitry, either one line or up to 512 lines of the video signals can be selected and transferred to the vertical CCD register. All of the video signals on the unselected lines are then transferred to the vertical CCD channel simultaneously and finally dumped to the vertical reset drain. Since this unique readout structure, a frame rate of up to 240 frames/second can be achieved for 128x128 of the SBD array under 5 MHz of clock frequency. A high-speed sub-frame readout format can be easily fulfilled under this architecture. This architecture not only maintains the advantages of line-addressed charge-accumulation structure but also provides the capability to readout any portion of the array.
URI: http://hdl.handle.net/11536/19186
http://dx.doi.org/10.1117/12.391728
ISBN: 0-8194-3654-2
ISSN: 0277-786X
DOI: 10.1117/12.391728
期刊: INFRARED DETECTORS AND FOCAL PLANE ARRAYS VI
Volume: 4028
起始頁: 157
結束頁: 165
顯示於類別:會議論文


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