An efficient memory architecture for motion estimation processor design

標題:	An efficient memory architecture for motion estimation processor design
作者:	TZENG, EG LEE, CY 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics
公開日期:	1995
URI:	http://hdl.handle.net/11536/20030
ISBN:	0-7803-2570-2
ISSN:	0277-674X
期刊:	1995 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3
起始頁:	712
結束頁:	715
顯示於類別：	會議論文