A NEW ALGORITHM AND ITS VLSI ARCHITECTURE DESIGN FOR CONNECTED COMPONENT LABELING

標題:	A NEW ALGORITHM AND ITS VLSI ARCHITECTURE DESIGN FOR CONNECTED COMPONENT LABELING
作者:	JEAN, SD LIU, CM CHANG, CC CHEN, Z 資訊工程學系 Department of Computer Science
公開日期:	1994
URI:	http://hdl.handle.net/11536/20176
ISBN:	0-7803-1915-X
期刊:	1994 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2: DIGITAL SIGNAL PROCESSING (DSP)
起始頁:	B565
結束頁:	B568
顯示於類別：	會議論文