標題: | An Effective Chip Implementation of A Real-time Eight-channel EEG Signal Processor Based on On-line Recursive ICA Algorithm |
作者: | Shih, Wei-Yeh Huang, Kuan-Ju Chen, Chiu-Kuo Fang, Wai-Chi Cauwenberghs, Gert Jung, Tzyy-Ping 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2012 |
摘要: | This paper presents an effective chip implementation of a real-time eight-channel electroencephalogram signal processor based on on-line recursive independent component analysis (ORICA) algorithm. The system architecture is composed of a memory unit, a whitening unit, an ORICA training unit, and an ORICA computation unit. The proposed architecture is implemented using TSMC 90 nm CMOS technology. It occupies a core area of 800x800 mu m(2) and consumes 4.18 mW at a core supply voltage of 1.0 V and 50 MHz clock operating frequency. Simulated super and sub-Gaussian signals are used to verify the system. The separated signals match those obtained using off-line Matlab-based analysis. |
URI: | http://hdl.handle.net/11536/21544 |
ISBN: | 978-1-4673-2293-5 |
ISSN: | 2163-4025 |
期刊: | 2012 IEEE BIOMEDICAL CIRCUITS AND SYSTEMS CONFERENCE (BIOCAS): INTELLIGENT BIOMEDICAL ELECTRONICS AND SYSTEM FOR BETTER LIFE AND BETTER ENVIRONMENT |
起始頁: | 192 |
結束頁: | 195 |
顯示於類別: | 會議論文 |