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5.5 GHz Low Voltage and High Linearity RF CMOS Mixer Design

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10.1109/EMICC.2008.4772256

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A CMOS mixer was design with a new circuit scheme to realize low voltage and high linearity simultaneously. A double balanced Gilbert cell was adopted as the basic topology and TSMC 0.18 mu m 1P6M CMOS process was employed for the on-chip RF circuit fabrication. The proposed new circuit scheme consists of LC-tanks as a capacitively coupled resonator for low voltage and multi-stage parallel RC networks for linearity improvement. Furthermore, multi-gated structure is applied at the RF input as a transconductance amplifier to enhance conversion gain and linearity. The new circuit scheme enables a successful low voltage operation at 1-V for 0.18 mu m technology. The measured circuit performance demonstrates superior linearity with IIP3 of 11 dBm and P(1dB) of 2.2 dBm. The conversion gain can be maintained at 8.1 dB in a wide frequencies of 5GHz to 6.8GHz.

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