| Title: | 單晶片系統驗證之核心技術開發---子計畫四：單晶片系統設計流程之實體驗證(II) Physical Verification for SoC Design Flow(II) |
| Authors: | 江蕙如 Jiang Iris Hui-Ru 交通大學電子工程系 |
| Issue Date: | 2006 |
| Gov't Doc #: | NSC95-2220-E009-018 |
| URI: | http://hdl.handle.net/11536/89068 https://www.grb.gov.tw/search/planDetail?id=1279616&docId=234487 |
| Appears in Collections: | Research Plans |
