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dc.contributor.author董蘭榮en_US
dc.contributor.authorDung Lan-Rongen_US
dc.date.accessioned2014-12-13T10:32:49Z-
dc.date.available2014-12-13T10:32:49Z-
dc.date.issued2003en_US
dc.identifier.govdocNSC92-2220-E009-033zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/91734-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=890049&docId=170369en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.title先進電子設計自動化技術研發---子計畫VI:用於奈米晶片系統設計之功率意識高階合成研究(I)zh_TW
dc.titleStudy on Power-Aware High-Level Synthesis Techniques for Nenometer SOC Design(I)en_US
dc.typePlanen_US
dc.contributor.department國立交通大學電機與控制工程學系zh_TW
Appears in Collections:Research Plans


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