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學術出版;;Publications
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全數位鎖相迴路設計與應用之研究(III)
全數位鎖相迴路設計與應用之研究(III)
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902215E009105.pdf
(710.79 KB)
902215E009105.pdf
(710.79 KB)
Date
2001
Authors
李鎮宜
LEE CHEN-YI
Journal Title
Journal ISSN
Volume Title
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DOI
Abstract
Description
Keywords
鎖相迴路
,
電路設計
,
振盪電路
,
Phase lock loop (PLL)
,
Circuit design
,
oscillation circuit
Citation
URI
https://www.grb.gov.tw/search/planDetail?id=665804&docId=126399
https://ir.lib.nycu.edu.tw/handle/11536/93384
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