Ultra-Low Power Green Electronic Devices

Abstract

Power consumption is the crucial challenge for electronics. To lower the DC leakage power (P-DC), we applied the high-kappa gate dielectric to CMOS from the physics of Q equivalent to CV. More than 2 orders of magnitude lower P-DC is obtained at small 0.5 similar to 0.9 nm equivalent-oxide-thickness (EOT). The high-kappa dielectric also increases the charge controllability of flash memory and decrease the V-T disturbance by nearly cells, which improves cell density and cost. The AC power (P-AC) can be lowered by using high-mobility Ge CMOS at a lower V-D and 3D IC with a small capacitance, from basic physics of P-AC equivalent to CV(D)(2)f/2.