A systematic design of protocol processors

dc.citation.epage	1038	en_US
dc.citation.spage	1034	en_US
dc.contributor.author	Chen, AY	en_US
dc.contributor.author	Chen, YS	en_US
dc.contributor.author	Chang, RC	en_US
dc.contributor.author	Wen, KA	en_US
dc.contributor.department	交大名義發表	zh_TW
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	National Chiao Tung University	en_US
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.date.accessioned	2014-12-08T15:27:39Z
dc.date.available	2014-12-08T15:27:39Z
dc.date.issued	1996	en_US
dc.description.abstract	An innovative design methodology is proposed for protocol processors design. The protocol description is mapped to statecharts and statecharts are then mapped to a real-time operating system as well as microprocessors. The IS-54 protocol for cellular wireless communication mobile station is taken as the design example. And an efficient and easy-for-evaluation design environment is then constructed.	en_US
dc.identifier.isbn	0-7803-3692-5	en_US
dc.identifier.journal	PIMRC'96 - THE SEVENTH IEEE INTERNATIONAL SYMPOSIUM ON PERSONAL, INDOOR AND MOBILE RADIO COMMUNICATIONS, PROCEEDINGS, VOLS 1-3	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/19918
dc.identifier.wosnumber	WOS:A1996BH25X00214
dc.language.iso	en_US	en_US
dc.title	A systematic design of protocol processors	en_US
dc.type	Proceedings Paper	en_US

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